A 270 GHz-band image rejection SIS mixer is developed. This mixer employs planer type image rejection configuration and is integrated into a single-chip as in MMIC's at microwave frequency. In order to use sapphire substrate at 270 GHz-band, CPW transmission lines are selected to realize 50-70Ω characteristic impedances. The fabricated MMIC SIS mixer performs 12-24 dB image rejection ratio with 450-780 K noise temperature at 270 GHz.

A 90 GHz band planar-type superconducting mixer using Ba1-xKxBiO3 (BKBO) bicrystal junctions was fabricated on a MgO bicrystal substrate. The mixer is integrated with microwave circuits and two junctions, but we could not operate the mixer in image rejection mode because of process damage to the junction properties. However we confirmed the mixing operation; the intermediate frequency (IF) signal was observed up to 17K (LO87 GHz, RF92 GHz).

High-power T/R switch with GaN HEMT technology is successfully developed, and the design theory is formulated. The proposed switch employs an asymmetric series-shunt/shunt configuration. Because the power handling capability of the proposed switch is mainly dependent of the breakdown voltage of FETs, the proposed circuit can make full use of the characteristics of the GaN HEMT technology. The switch has a high degree of freedom for the FET gate widths, so the low insertion loss can be obtained while keeping high-power performances. To verify this methodology, T/R switch has been fabricated in X-band. The fabricated switch has demonstrated an insertion loss of 1.8 dB in Rx-mode, 1.2 dB in Tx-mode and power handling capability of 20 W in 53% bandwidth.

A C-Ku band 5-bit MMIC phase shifter using optimized reflective series/parallel LC circuits is presented. The proposed circuit has frequency independent characteristics in the case of 180 phase shift, ideally. Also, an ultra-broad-band circuit design theory for the 180 optimized reflective circuit has derived, which gives optimum characteristics compromising between loss and phase shift error. The fabricated 5-bit MMIC phase shifter with SPDT switch has successfully demonstrated a typical insertion loss of 9.4 dB 1.4 dB, and a maximum RMS phase shift error of 7 over the 6 to 18 GHz band. The measured results validate the proposed design theory of the phase shifter.

A large-signal simulation program for multi-stage power amplifier modules by using a novel interpolation is presented. This simulation program has the function to make the Load-Pull and Source-Pull (LP/SP) data required for the simulation. By using the interpolation, a lot of LP/SP data can be made from a small number of measured LP/SP data. The interpolation is based on the calculation method using a two-dimensional function. By using the simulation program, we can calculate the large-signal characteristics depended on frequency and temperature of the multi-stage amplifier module. We apply the simulation program to the design of the amplifier. The calculated and measured results agree well. The accuracy of the presented interpolation is confirmed. It is considered that the presented program is useful to calculate large-signal characteristics of the amplifier module.

A compact Ku-band 5-bit monolithic microwave integrated circuit (MMIC) phase shifter has been demonstrated. The total gate width of switching FETs and the total inductance of spiral inductors are proposed as the figures of merit for compactness. The phase shifter uses the T-type and PI-type high-pass filter (HPF)/band-pass filter (BPF) circuits in which FET "off"-state capacitances are incorporated as the filter elements. According to the figures of merit, the T-type is selected for 90-degree phase shift circuit and the PI-type is selected for the 45-degree phase shift circuit. The fabricated 5-bit phase shifter performs average insertion loss of 5.6 dB and RMS phase shift error of 3.77 degrees with die size of 1.65 mm 0.76 mm (1.25 mm2) in Ku-band.

A millimeter-wave low-loss, high-isolation and high-power terminated MMIC switch is developed, and the design theory is formulated. Our invented switch is designed based on a non-linear relationship between the parallel resistance of an FET and its gate width. Our measurements of the parallel resistance with different gate width have revealed that the resistance is inverse proportion to a square of the gate width. By using this relationship, we have found the fact that the multiple FET resonators with smaller gate width and high inductance elements realize high-Q performance for the same resonant frequency. Since the power handling capability is determined by the total gate width, our switch circuit could reduce its insertion loss, keeping the high-power performance. We additionally describe the design method of this switch circuit. The relationships between the gate widths of the FETs and the electrical performances are described analytically. The required gate widths of the FETs for handling high power signal are represented, and the design equations to obtain lower insertion loss and higher isolation performances keeping high power capability are presented. To verify this methodology, we fabricated a MMIC switch. The MMIC had insertion loss of 2.86 dB, isolation of 37 dB and power handling capability of more than 33 dBm at 32 GHz.

High-power protection switch utilizing a new stub/line selectable configuration is presented. By employing the proposed circuit topology, the insertion loss at receiving mode and the power handling capability at transmitting mode can be independently designed. Therefore, the proposed circuit is able to achieve low insertion loss at receiving mode while keeping high-power performance at transmitting mode. To verify this methodology, MMIC switch has been fabricated in Ka-band. The circuit has achieved the insertion loss of 2 dB, the isolation of 25 dB, and the power handling capability of 40 dBm at 5% bandwidth.