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[Author] Shigeo ASAHARA(2hit)

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  • Realtime Concatenation Technique for Skeletal Motion in Humanoid Animation

    Yoshiyuki MOCHIZUKI  Toshiya NAKA  Shigeo ASAHARA  

     
    PAPER-Computer Graphics

      Vol:
    E84-D No:1
      Page(s):
    188-200

    In this paper, we propose a realtime concatenation technique between basic skeletal motions obtained by the motion capture technique and etc. to generate a lifelike behavior for a humanoid character (avatar). We execute several experiments to show the advantage and the property of our technique and also report the results. Finally, we describe our applied system called WonderSpace which leads participants to the exciting and attractive virtual worlds with humanoid characters in cyberspace. Our concatenation technique has the following features: (1) based on a blending method between a preceding motion and a succeeding motion by a transition function, (2) realizing "smooth transition," "monotone transition," and "equivalent transition" by the transition function called paste function, (3) generating a connecting interval by making the backward and forward predictions for the preceding and succeeding motions, (4) executing the prediction under the hypothesis of "the smooth stopping state" or "the state of connecting motion", (5) controlling the prediction intervals by the parameter indicating the importance of the motion, and (6) realizing realtime calculation.

  • High-Level Synthesis of a Multithreaded Processor for Image Generation

    Takao ONOYE  Toshihiro MASAKI  Isao SHIRAKAWA  Hiroaki HIRATA  Kozo KIMURA  Shigeo ASAHARA  Takayuki SAGISHIMA  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E78-A No:3
      Page(s):
    322-330

    The design procedure of a multithreaded processor dedicated to the image generation is described, which can be achieved by means of a high-level synthesis tool PARTHENON. The processor employs a multithreaded architecture which is a novel promising approach to the parallel image generation. This paper puts special stress on the high-level synthesis scheme which can simplify the behavioral description for the structure and control of a complex hardware, and therefore enables the design of a complicated mechanism for a multithreaded processor. Implementation results of the synthesis are also shown to demonstrate the performance of the designed processor. This processor greatly improves the throughput of the image generation so far attained by the conventional approach.