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[Author] Takayuki SAGISHIMA(2hit)

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  • Transient Analysis of Electrical and Linear Charge Injection into CCD

    Takaaki BABA  Takayuki SAGISHIMA  Teruo KITANI  Reiichi SASAKI  

     
    PAPER-Semiconductors

      Vol:
    E61-E No:7
      Page(s):
    519-526

    Transient numerical analysis of electrical signal injection into the surface CCD is given regarding the potential equilibration method. The analysis is composed of the charging and discharging processes of signal charges, characterized by time intervals TC and TD of the respective input pulses. A concept of setting time TS" explains how the mode of injection converts from the potential equilibration to dynamic injection, and determines a optimum TC . A concept of residual effect of excess charges" is discussed in relation to sampling effect. The procedure to determine a optimum TD is also proposed. It is concluded that the optimum TC and TD for completion of linear charge preset are determined by device geometry (that is, electrode lengths of the CCD input gates), while the TC also depends on the bias condition of the input pulses. The above conclusions can be applied to setting input pulses and the structure of CCD inputs designed for analog signal processing.

  • High-Level Synthesis of a Multithreaded Processor for Image Generation

    Takao ONOYE  Toshihiro MASAKI  Isao SHIRAKAWA  Hiroaki HIRATA  Kozo KIMURA  Shigeo ASAHARA  Takayuki SAGISHIMA  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E78-A No:3
      Page(s):
    322-330

    The design procedure of a multithreaded processor dedicated to the image generation is described, which can be achieved by means of a high-level synthesis tool PARTHENON. The processor employs a multithreaded architecture which is a novel promising approach to the parallel image generation. This paper puts special stress on the high-level synthesis scheme which can simplify the behavioral description for the structure and control of a complex hardware, and therefore enables the design of a complicated mechanism for a multithreaded processor. Implementation results of the synthesis are also shown to demonstrate the performance of the designed processor. This processor greatly improves the throughput of the image generation so far attained by the conventional approach.