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Masaru KOKUBO Masaaki SHIDA Takashi OSHIMA Yoshiyuki SHIBAHARA Tatsuji MATSUURA Kazuhiko KAWAI Takefumi ENDO Katsumi OSAKI Hiroki SONODA Katsumi YAMAMOTO Masaharu MATSUOKA Takao KOBAYASHI Takaaki HEMMI Junya KUDOH Hirokazu MIYAGAWA Hiroto UTSUNOMIYA Yoshiyuki EZUMI Kunio TAKAYASU Jun SUZUKI Shinya AIZAWA Mikihiko MOTOKI Yoshiyuki ABE Takao KUROSAWA Satoru OOKAWARA
We have proposed a new low-IF transceiver architecture to simultaneously achieve both a small chip area and good minimum input sensitivity. The distinctive point of the receiver architecture is that we replace the complicated high-order analog filter for channel selection with the combination of a simple low-order analog filter and a sharp digital band-pass filter. We also proposed a high-speed convergence AGC (automatic gain controller) and a demodulation block to realize the proposed digital architecture. For the transceiver, we further reduce the chip area by applying a new form of direct modulation for the VCO. Since conventional VCO direct modulation tends to suffer from variation of the modulation index with frequency, we have developed a new compensation technique that minimizes this variation, and designed the low-phase noise VCO with a new biasing method to achieve large PSRR (power-supply rejection ratio) for oscillation frequency. The test chip was fabricated in 0.35-µm BiCMOS. The chip size was 3 3 mm2; this very small area was realized by the advantages of the proposed transceiver architecture. The transceiver also achieved good minimum input sensitivity of -85 dBm and showed interference performance that satisfied the requirements of the Bluetooth standard.
Masaru KOKUBO Takashi OSHIMA Katsumi YAMAMOTO Kunio TAKAYASU Yoshiyuki EZUMI Shinya AIZAWA
The use of a two-point modulator with variable PLL loop bandwidth as a GFSK signal generator is proposed. Delta-sigma modulation is adopted for the modulator. Through the combination of a variable PLL feedback loop and delta-sigma modulation, both a fast settling time and very clear eye opening are achieved for the modulator. We fabricate it in 0.35-µm BiCMOS process technology. The two-point modulator has a center-frequency drift of only 14.9 kHz, much lower than the 178-kHz result for a single time slot in the case of direct VCO modulation. This is due to the PLL feedback loop. Evaluation also confirmed that the circuit satisfies the various characteristics required of a Bluetooth transmitter. The two-point modulator is also applicable to other transceivers which use FSK or PSK modulation, i.e. forms of modulation where a constant signal level is transmitted, and thus contributes to the simplification of a range of wireless transmitters.