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A Small-Chip-Area Transceiver IC for Bluetooth Featuring a Digital Channel-Selection Filter

Masaru KOKUBO, Masaaki SHIDA, Takashi OSHIMA, Yoshiyuki SHIBAHARA, Tatsuji MATSUURA, Kazuhiko KAWAI, Takefumi ENDO, Katsumi OSAKI, Hiroki SONODA, Katsumi YAMAMOTO, Masaharu MATSUOKA, Takao KOBAYASHI, Takaaki HEMMI, Junya KUDOH, Hirokazu MIYAGAWA, Hiroto UTSUNOMIYA, Yoshiyuki EZUMI, Kunio TAKAYASU, Jun SUZUKI, Shinya AIZAWA, Mikihiko MOTOKI, Yoshiyuki ABE, Takao KUROSAWA, Satoru OOKAWARA

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Summary :

We have proposed a new low-IF transceiver architecture to simultaneously achieve both a small chip area and good minimum input sensitivity. The distinctive point of the receiver architecture is that we replace the complicated high-order analog filter for channel selection with the combination of a simple low-order analog filter and a sharp digital band-pass filter. We also proposed a high-speed convergence AGC (automatic gain controller) and a demodulation block to realize the proposed digital architecture. For the transceiver, we further reduce the chip area by applying a new form of direct modulation for the VCO. Since conventional VCO direct modulation tends to suffer from variation of the modulation index with frequency, we have developed a new compensation technique that minimizes this variation, and designed the low-phase noise VCO with a new biasing method to achieve large PSRR (power-supply rejection ratio) for oscillation frequency. The test chip was fabricated in 0.35-µm BiCMOS. The chip size was 3 3 mm2; this very small area was realized by the advantages of the proposed transceiver architecture. The transceiver also achieved good minimum input sensitivity of -85 dBm and showed interference performance that satisfied the requirements of the Bluetooth standard.

Publication
IEICE TRANSACTIONS on Electronics Vol.E87-C No.6 pp.878-887
Publication Date
2004/06/01
Publicized
Online ISSN
DOI
Type of Manuscript
Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
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