1-5hit |
Takayuki MORISHITA Youichi TAMURA Tatsuo OTSUKI Gota KANO
We have developed a 64-neuron electrically trainable BiCMOS analog neuroprocessor based on 3-layered PDP networks with a feedforward time as short as 10 µs which is equivalent to the operation speed as high as 108 multiplications per second. A crucial point in this development is application of a dynamic refreshment technique to a weighting circuit. A sufficiently long retention time of the synapse weight has thereby been attained, leading to a practical operation of the neuroprocessor.
Takayuki MORISHITA Youichi TAMURA Takami SATONAKA Atsuo INOUE Shin-ichi KATSU Tatsuo OTSUKI
We have developed a digital coprocessor with a dynamically reconfigurable pipeline architecture specified for a layered neural network which executes on-chip learning. The coprocessor attains a learning speed of 18 MCUPS that is approximately twenty times that of the conventional DSP. This coprocessor obtains expansibility in the calculation through a larger multi-layer, network by means of a network decomposition and a distributed processing approach.
Tatsuo OTSUKI Tsuyoshi TANAKA Noriyuki YOSHIKAWA Akio SHIMANO Hiromitsu TAKAGI Gota KANO
A GaAs monolithic high-frequency modulator IC which provides an efficient suppression of the RIN of a laser diode under application of the high-frequency power to the diode is reported. The oscillation frequency and the output power of the IC are designed to be 800 MHz and 15 dBm, respectively. Use of the IC permitted suppression of the RIN of the laser diode by almost 10 dB/Hz.
Koji ASARI Hiroshige HIRANO Toshiyuki HONDA Tatsumi SUMI Masato TAKEO Nobuyuki MORIWAKI George NAKANE Tetsuji NAKAKUMA Shigeo CHAYA Toshio MUKUNOKI Yuji JUDAI Masamichi AZUMA Yasuhiro SHIMADA Tatsuo OTSUKI
Ferroelectric non-volatile memory (FeRAM) has been inspiring interests since bismuth layer perovskite material family was found to provide "Fatigue Free" endurance, superior retention and imprint characteristics. In this paper, we will provide new circuits technology for FeRAM developed to implement high speed operation, low voltage operation and low power consumption. Performance of LSI embedded with FeRAM for contactless IC card is also provided to demonstrate the feasibility of the circuit technology.
Koji ARITA Eiji FUJII Yasuhiro SHIMADA Yasuhiro UEMOTO Masamichi AZUMA Shinichiro HAYASHI Toru NASU Atsuo INOUE Akihiro MATSUDA Yoshihisa NAGANO Shin-ich KATSU Tatsuo OTSUKI Gota KANO Larry D. McMILLAN Carlos A. Paz de ARAUJO
Characterization of silicon devices incorporating the capacitor which uses ferroelectric thin films as capacitor dielectrics is presented. As cases in point, a DRAM cell capacitor and an analog/digital silicon IC using the thin film of barium strontium titanate (Ba1-xSRxTiO3) are examined. Production and characterization of the ferroelectric thin films are also described, focusing on a Metal Organic Deposition technique and liquid source CVD.