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Shun SUGIURA Shigeru KISHIMOTO Takashi MIZUTANI Masayuki KURODA Tetsuzo UEDA Tsuyoshi TANAKA
We have fabricated enhancement-mode n-channel GaN MOSFETs with overlap gate structure on a p-GaN using thick HfO2 as a gate insulator. The maximum transconductance of 23 mS/mm which is 4 times larger, to our knowledge, than the best-reported value of the normally-off GaN MOSFETs with SiO2 gate oxide has been obtained.
Hidetoshi ISHIDA Kazuo MIYATSUJI Tsuyoshi TANAKA Daisuke UEDA Chihiro HAMAGUCHI
A novel method to obtain a compact plastic package with higher isolation by providing subsidiary inner ground leads between outer leads is proposed and demonstrated. The effect of the subsidiary ground leads is investigated by using a 3-dimensional electromagnetic field simulation and measuring the fabricated packages. Newly designed package with subsidiary ground leads achieves higher isolation by more than 10 dB at 3 GHz as compared to a conventional package. This package is applied to GaAs SPDT switch IC's. Isolation of the switch IC's is improved by 5 dB at 3 GHz by the subsidiary inner ground leads. The isolation characteristics are discussed based on the equivalent circuit extracted from the simulation results.
Yoshiharu ANDA Katsuhiko KAWASHIMA Mitsuru NISHITSUJI Tsuyoshi TANAKA
We report 0.15-µm T-shaped gate MODFETs using BCB (Benzocyclobutene) as low-k spacer dielectric material. The RF performance of pseudomorphic MODFET was improved by reducing the gate fringing capacitance using low-k material. The BCB film was deposited by plasma CVD technique at 100C and was patterned by lift-off technique. The dielectric constant of BCB film deposited by plasma CVD was confirmed 2.7, which is equal to that of spin-coated BCB, and is 35% lower than that of conventional SiO2. The leakage current was 4.710-5 A/cm2 at 3.6 MV/cm and was low enough for spacer material. 0.15-µm T-shaped gate MODFETs were fabricated by using BCB spacer and phase-shift lithography technique. More than 20 GHz increase of fmax was obtained in comparison with conventional SiO2 spacer by reducing the gate fringing capacitance.
Keiichi MURAYAMA Masaaki NISHIJIMA Manabu YANAGIHARA Tsuyoshi TANAKA
The temperature compensation technique of InGaP/GaAs power heterojunction bipolar transistor (HBT) with novel bias circuit using Schottky diodes has been developed. The variation in the quiescent current to the temperature is less than 30% from -30C to 90C by this technique, where that is about 125% by the conventional bias circuit. The RF performance of the power HBT MMIC with novel bias circuit shows flat temperature characteristics enough to be used for power application of wireless communications.
Naohiro TSURUMI Motonori ISHII Masaaki NISHIJIMA Manabu YANAGIHARA Tsuyoshi TANAKA Daisuke UEDA
InGaP/GaAs HBT with novel ledge coupled capacitor (LCC) structure has been proposed and demonstrated for the first time. The LCC employs an extrinsic InGaP ledge layer as a capacitor parallel to the base resistor. This configuration enables feeding RF signals directly into the base without passing them through the base resistor. With the fabricated HBT, no increase of leakage current between emitter and base electrode was observed. The maximum oscillation frequency (fmax) of the HBT was improved by 10 GHz as compared with an HBT without the LCC.
Toshinobu MATSUNO Atsuhiko KANDA Tsuyoshi TANAKA
We present excellent performance of a novel two-stage SiGe hetero-bipolar transistor (HBT) power amplifier (PA) in which different collector doping structures were employed for the first and second stages. A selectively ion implanted collector (SIC) structure was employed for the first stage HBT in order to obtain a high gain, while without-SIC structure was used for the second stage HBT in order to achieve a high breakdown voltage. At 1.95 GHz, the total PAE of 31% and a gain of 28 dB with an output power (Pout) of 26 dBm were obtained while the adjacent channel power ratio (ACPR) was less than -38 dBc for W-CDMA modulation signals.
Yutaka HIROSE Yoshito IKEDA Motonori ISHII Tomohiro MURATA Kaoru INOUE Tsuyoshi TANAKA Hiroyasu ISHIKAWA Takashi EGAWA Takashi JIMBO
We present ultra low noise- and wide dynamic range performances of an AlGaN/GaN heterostructure FET (HFET). An HFET fabricated on a high quality epitaxial layers grown on a semi-insulating SiC substrate exhibited impressively low minimum noise figure (NF min ) of 0.4 dB with 16 dB associated gain at 2 GHz. The low NF (near NF min ) operation was possible in a wide drain bias voltage range, i.e. from 3 V to 15 V. At the same time, the device showed low distortion character as indicated by the high third order input intercept point (IIP3), +13 dBm. The excellent characteristics are attributed to three major factors: (1) high quality epitaxial layers that realized a high transconductance and very low buffer leakage current; (2) excellent device isolation made by selective thermal oxidation; (3) ultra low gate leakage current realized by Pd based gate. The results demonstrate that the AlGaN/GaN HFET is a strong candidate for front-end LNAs in various mobile communication systems where both the low noise and the wide dynamic range are required.
Tsuyoshi TANAKA Hideo NAGAI Daisuke UEDA
A GaAs defferential oscillator IC with on-chip LC resonator has been developed for suppressing the relative intensity noise (RIN) of a laser diode. The relationship between the Q-factor and minimum supply voltage for oscillation is fully described. In view of reducing the present LC resonator, we made use of BST (Barium Strontium Titanate) capacitor to make the resonator without increasing the chip area. The oscillation frequency is stable since it's determined by the geometry of the resonator. The experimentally fabricated oscillator IC achieved the output power of 12 dBm at the frequency of 600 MHz with voltage/current conditions of 2 V/20 mA. The present IC keeps quite stable RIN value less than -138 dB/Hz under the light-feedback condition up to 10%.
Noboru NEGORO Masayuki KURODA Tomohiro MURATA Masaaki NISHIJIMA Yoshiharu ANDA Hiroyuki SAKAI Tetsuzo UEDA Tsuyoshi TANAKA
High output power AlGaN/GaN metal-insulator-semiconductor (MIS) hetero-junction field effect transistor (HFET) on Si substrate for millimeter-wave application has developed. High temperature chemical vapor deposition (HT-CVD) grown SiN as a gate insulator improves the breakdown characteristics which enables the operation at high drain voltage of 55 V. The device exhibits high drain current of 1.1 A/mm free from the current collapse and high RF gain of 10.4 dB. The amplifier module developed AlGaN/GaN MIS-HFET with the gate width of 5.4 mm exhibits an output power of 10.7 W and a linear gain of 4 dB at 26.5 GHz. The resultant high output power is very promising for long-distance communication at millimeter-wave in the future which would enable high speed and high density data transmission.
Hiroshi TAKAHASHI Shigeshi ABIKO Kenichi TASHIRO Kaoru AWAKA Yutaka TOYONOH Rimon IKENO Shigetoshi MURAMATSU Yasumasa IKEZAKI Tsuyoshi TANAKA Akihiro TAKEGAMA Hiroshi KIMIZUKA Hidehiko NITTA Miki KOJIMA Masaharu SUZUKI James Lowell LARIMER
A new high-speed and low-power digital signal processor (DSP) core, C55x, was developed for next generation applications such as 3G cellular phone, PDA, digital still camera (DSC), audio, video, embedded modem, DVD, and so on. To support such MIPS-rich applications, a packet size of an instruction fetch increased from 16-bit to 32-bit comparing with the world's most popular C54x DSP core, while maintaining complete software compatibility with the legacy DSP code. An on-chip instruction buffer queue (IBQ) automatically unpacks the packets and issues multiple instructions in parallel for the efficient use of circuit resources. The efficiency of the parallelism has been further improved by additional hardwares such as second 1717-bit MAC, a 16-bit ALU, and three temporary registers that can be used for simple computations. Four 40-bit accumulators make it possible to execute more operation per cycle with dramatically reduced overall power consumption. These new architecture allows two times efficiency of instruction per cycle (IPC) than the previous DSP core on typical applications at the same MHz. The new DSP core was designed for TI's two 130 nm technologies, one with high-VT for low-leakage and middle-performance operation at 1.5 V, and the other with low-VT for high-performance and low-VDD operation at 1.2 V, to provide best choices for any applications with a single layout data base. With the low-leakage process, the DSP core operates at over 200 MHz with 188 µA/MHz (at 75% Dual MAC + 25% ADD) active power and less than 1.63 µA standby current. The high-performance process provides it with 300 MHz with 169 µA/MHz active power and less than 680 µA standby current. The new core was designed by a semi-custom approach (ASIC + custom library) using 5-level Cu metal system with low-k dielectric material of fluorosilicate glass (FSG), and about one million transistors are contained in the core. The total balance of its power, performance, area, and leakage current (PPAL) is well suitable to most of next generation applications. In this paper, we will discuss features of the new DSP core, including circuit design techniques for high-speed and low-power, and present an example product.
Tatsuo OTSUKI Tsuyoshi TANAKA Noriyuki YOSHIKAWA Akio SHIMANO Hiromitsu TAKAGI Gota KANO
A GaAs monolithic high-frequency modulator IC which provides an efficient suppression of the RIN of a laser diode under application of the high-frequency power to the diode is reported. The oscillation frequency and the output power of the IC are designed to be 800 MHz and 15 dBm, respectively. Use of the IC permitted suppression of the RIN of the laser diode by almost 10 dB/Hz.