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[Author] Tomohiro MURATA(6hit)

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  • Verification of Error Recovery Specification for Distributed Data by Using Colored Petri Nets

    Masaharu AKATSU  Tomohiro MURATA  Kenzo KURIHARA  

     
    PAPER

      Vol:
    E74-A No:10
      Page(s):
    3159-3167

    In systems where the same data are distributed in plural memories, data consistency must be maintained after a failure. It is important to verify that error recovery specifications guarantee the data consistency, and it is difficult because system status is nondeterministic after a failure occurs. In this paper, a method of modeling and verifying error recovery specifications by using colored Petri nets is proposed. First, the concept of data freshness is introduced to describe the relationship between the data explicitly. Then, a flow-chart that describes data renewal sequences is converted into a Petri net. Failure events and recovery procedures are added to the model. Consistency is verified by investigating reachable markings and by checking for the existence of states in which data freshness is contradictory. The number of reachable markings is generally enormous and sometimes infinite. Thus, the condition in which two markings are identified for verification is studied. The introduction of the equivalence relation itno reachable markings reduces the number of the markings to be verified. The usefulness of the proposed approach is demonstrated by a read/write process of a disk controller with a built-in cache memory. This example makes it clear that the analysis is helpful not only for checking whether the data is consistent, but also for designing the recovery procedures maintaining the data consistency.

  • FOREWORD

    Tomohiro MURATA  

     
    FOREWORD

      Vol:
    E78-A No:11
      Page(s):
    1445-1446
  • State Diagram Matrix for Hierarchical Specification of Reactive System

    Tomohiro MURATA  Kenzou KURIHARA  Ayako ASHIDA  

     
    PAPER

      Vol:
    E76-A No:10
      Page(s):
    1591-1597

    Reactive systems respond to internal or external stimuli and act in an event-driven manner. It is generally difficult to specify a complex reactive systems' behavior using conventional state machine formalism. One reason is that actual reactive systems are usually formed by combining plural state-machince that behave concurretly. This paper presents the State Diagram Matrix (SDM) which is a visual and hierarchical formalism of such a reactive system's behavior. SDM has two concepts. The first is matrix plane description on which 3-dimensional state space is projected. The second is state abstraction for hierarchical state-machine definition. Understandability and reliability of control software was improved as a consequence of adopting SDM for specifying disk-subsystem control requirements. The development support functions of SDM using a workstation are also described.

  • Total High Performance Time and Design of Degradable Real-Time Systems

    Masaharu AKATSU  Tomohiro MURATA  Kenzo KURIHARA  

     
    PAPER-Concurrent Systems, Discrete Event Systems and Petri Nets

      Vol:
    E77-A No:3
      Page(s):
    510-516

    This paper proposes the Total High Performance Time as a performance-related reliability measure in degradable/recoverable real-time systems. This measure reflects the effect of system behavior in pending states that are temporary states between the normal state and degraded states where the system operates in a degraded mode as a consequence of component failures. Such systems have to perform not only normal procedures but also error/recovery procedures in pending states, so the performance there is lower than that in the degraded states. In real-time systems, if performance is less than a lower limit, the response time for on-line transactions cannot meet the deadline. The consequences of failing to meet the deadline could be system failure. Therefore, the system reliability is affected significantly by whether the performance there is higher than the lower limit or not. A state where the level of performance is higher than the lower limit is called a High Performance State. We define the Total High Performance Time as the total time that the system spends operating in High Performance States. Moreover, this paper explains how to utilize the Total High Performance Time in system design. We model a method of controlling a system in pending states by using Extended Stochastic Petri Nets and obtain the characteristics necessary for evaluating the Total High Performance Time by analyzing the model. This approach is applied to a storage system that controls mirrored disks, and shown to be helpful for designing a method of controlling a system in pending states, which has been considered difficult because of the trade-off between performance and reliability.

  • Low Noise and Low Distortion Performances of an AlGaN/GaN HFET

    Yutaka HIROSE  Yoshito IKEDA  Motonori ISHII  Tomohiro MURATA  Kaoru INOUE  Tsuyoshi TANAKA  Hiroyasu ISHIKAWA  Takashi EGAWA  Takashi JIMBO  

     
    PAPER

      Vol:
    E86-C No:10
      Page(s):
    2058-2064

    We present ultra low noise- and wide dynamic range performances of an AlGaN/GaN heterostructure FET (HFET). An HFET fabricated on a high quality epitaxial layers grown on a semi-insulating SiC substrate exhibited impressively low minimum noise figure (NF min ) of 0.4 dB with 16 dB associated gain at 2 GHz. The low NF (near NF min ) operation was possible in a wide drain bias voltage range, i.e. from 3 V to 15 V. At the same time, the device showed low distortion character as indicated by the high third order input intercept point (IIP3), +13 dBm. The excellent characteristics are attributed to three major factors: (1) high quality epitaxial layers that realized a high transconductance and very low buffer leakage current; (2) excellent device isolation made by selective thermal oxidation; (3) ultra low gate leakage current realized by Pd based gate. The results demonstrate that the AlGaN/GaN HFET is a strong candidate for front-end LNAs in various mobile communication systems where both the low noise and the wide dynamic range are required.

  • K-Band AlGaN/GaN MIS-HFET on Si with High Output Power over 10 W

    Noboru NEGORO  Masayuki KURODA  Tomohiro MURATA  Masaaki NISHIJIMA  Yoshiharu ANDA  Hiroyuki SAKAI  Tetsuzo UEDA  Tsuyoshi TANAKA  

     
    PAPER-GaN-based Devices

      Vol:
    E95-C No:8
      Page(s):
    1327-1331

    High output power AlGaN/GaN metal-insulator-semiconductor (MIS) hetero-junction field effect transistor (HFET) on Si substrate for millimeter-wave application has developed. High temperature chemical vapor deposition (HT-CVD) grown SiN as a gate insulator improves the breakdown characteristics which enables the operation at high drain voltage of 55 V. The device exhibits high drain current of 1.1 A/mm free from the current collapse and high RF gain of 10.4 dB. The amplifier module developed AlGaN/GaN MIS-HFET with the gate width of 5.4 mm exhibits an output power of 10.7 W and a linear gain of 4 dB at 26.5 GHz. The resultant high output power is very promising for long-distance communication at millimeter-wave in the future which would enable high speed and high density data transmission.