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Nan SHA Yuanyuan GAO Xiaoxin YI Wei JIAN Weiwei YANG
In this letter, we combine minimum-shift keying (MSK) with physical-layer network coding (PNC) to form a new scheme, i.e., MSK-PNC, for two-way relay channels (TWRCs). The signal detection of the MSK-PNC scheme is investigated, and two detection methods are proposed. The first one is orthogonal demodulation and mapping (ODM), and the second one is two-state differential detection (TSDD). The error performance of the proposed MSK-PNC scheme is evaluated through simulations.
Tian CHEN Dandan SHEN Xin YI Huaguo LIANG Xiaoqing WEN Wei WANG
Linear feedback shift register (LFSR) reseeding is an effective method for test data reduction. However, the test patterns generated by LFSR reseeding generally have high toggle rate and thus cause high test power. Therefore, it is feasible to fill X bits in deterministic test cubes with 0 or 1 properly before encoding the seed to reduce toggle rate. However, X-filling will increase the number of specified bits, thus increase the difficulty of seed encoding, what's more, the size of LFSR will increase as well. This paper presents a test frame which takes into consideration both compression ratio and power consumption simultaneously. In the first stage, the proposed reseeding-oriented X-filling proceeds for shift power (shift filling) and capture power (capture filling) reduction. Then, encode the filled test cubes using the proposed Compatible Block Code (CBC). The CBC can X-ize specified bits, namely turning specified bits into X bits, and can resolve the conflict between low-power filling and seed encoding. Experiments performed on ISCAS'89 benchmark circuits show that our scheme attains a compression ratio of 94.1% and reduces capture power by at least 15% and scan-in power by more than 79.5%.
Renato VAERNEWYCK Xin YIN Jochen VERBRUGGHE Guy TORFS Xing-Zhi QIU Efstratios KEHAYAS Johan BAUWELINCK
An integrated 2×28Gb/s dual-channel duobinary driver IC is presented. Each channel has integrated coding blocks, transforming a non-return-to-zero input signal into a 3-level electrical duobinary signal to achieve an optical duobinary modulation. To the best of our knowledge this is the fastest modulator driver including on-chip duobinary encoding and precoding. Moreover, it only consumes 652mW per channel at a differential output swing of 6Vpp.
Kun XU Yuanyuan GAO Xiaoxin YI Weiwei YANG
Joint transmit and receive antenna selection (JTRAS) is proposed for the multiple-input multiple-output (MIMO) two-way relaying channel. A simple and closed-form lower bound on the outage probability of JTRAS is derived. Furthermore, asymptotic analysis reveals that JTRAS can attain the maximum achievable diversity order of the MIMO dual-hop relaying channel.
Xin YIN Peter OSSIEUR Tine De RIDDER Johan BAUWELINCK Xing-Zhi QIU Jan VANDEWEGE
A current-mode squarer/divider circuit with a novel translinear cell is presented for automotive applications. The proposed circuit technique increases the accuracy of the squarer/divider function with better input dynamic range and temperature insensitivity. Simulation results show that the variation of the output current is within ±0.2% over the temperature range from -40 to 140.
Zhisheng LI Johan BAUWELINCK Guy TORFS Xin YIN Jan VANDEWEGE
This paper presents a new common-mode stabilization method for a CMOS differential cascode Class-E power amplifier with LC-tank based driver stage. The stabilization method is based on the identification of the poles and zeros of the closed-loop transfer function at a critical node. By adding a series resistor at the common-gate node of the cascode transistor, the right-half-plane poles are moved to the left half plane, improving the common-mode stability. The simulation results show that the new method is an effective way to stabilize the PA.
Nan SHA Yuanyuan GAO Xiaoxin YI Wenlong LI Weiwei YANG
A joint continuous phase frequency shift keying (CPFSK) modulation and physical-layer network coding (PNC), i.e., CPFSK-PNC, is proposed for two-way relay channels (TWRCs). This letter discusses the signal detection of the CPFSK-PNC scheme with emphasis on the maximum-likelihood sequence detection (MLSD) algorithm for the relay receiver. The end-to-end error performance of the proposed CPFSK-PNC scheme is evaluated through simulations.
Xin YIN Johan BAUWELINCK Tine DE RIDDER Peter OSSIEUR Xing-Zhi QIU Jan VANDEWEGE Olivier CHASLES Arnaud DEVOS Piet DE PAUW
We propose a novel 50 Mb/s optical transmitter fabricated in a 0.6 µm BiCMOS technology for automotive applications. The proposed VCSEL driver chip was designed to operate with a single supply voltage ranging from 3.0 V to 5.25 V. A fully integrated feedforward current control circuit is presented to stabilize the optical output power without any external components. The experimental results show that the optical output power can be stable within a 1.1 dB range and the extinction ratio greater than 14 dB over the automotive environmental temperature range of -40 to 105.
Guy TORFS Zhisheng LI Johan BAUWELINCK Xin YIN Jan VANDEWEGE Geert Van Der PLAS
A novel low-power kick-back reduced comparator for use in high-speed flash analog-to-digital converters (ADC) is presented. The proposed comparator combines cascode transistors to reduce the kick-back noise with a built-in threshold voltage to remove the static power consumption of a reference. Without degrading other figures, the kick-back noise is reduced by a factor 8, compared to a previous design without cascode transistors. An improved calibration structure is also proposed to improve linearity when used in an ADC. Simulated in a standard CMOS technology the comparator consumes 106.5 µW at 1.8 V power supply and 1 GHz clock frequency.