In this paper, we describe a post-processing technique having high extraction efficiency (ExE) for de-biasing and de-correlating a random bitstream generated by true random number generators (TRNGs). This research is based on the N-bit von Neumann (VN_N) post-processing method. It improves the ExE of the original von Neumann method close to the Shannon entropy bound by a large N value. However, as the N value increases, the mapping table complexity increases exponentially (2N), which makes VN_N unsuitable for low-power TRNGs. To overcome this problem, at the algorithm level, we propose a waiting strategy to achieve high ExE with a small N value. At the architectural level, a Hamming weight mapping-based hierarchical structure is used to reconstruct the large mapping table using smaller tables. The hierarchical structure also decreases the correlation factor in the raw bitstream. To develop a technique with high ExE and low cost, we designed and fabricated an 8-bit von Neumann with waiting strategy (VN_8W) in a 130-nm CMOS. The maximum ExE of VN_8W is 62.21%, which is 2.49 times larger than the ExE of the original von Neumann. NIST SP 800-22 randomness test results proved the de-biasing and de-correlation abilities of VN_8W. As compared with the state-of-the-art optimized 7-element iterated von Neumann, VN_8W achieved more than 20% energy reduction with higher ExE. At 0.45V and 1MHz, VN_8W achieved the minimum energy of 0.18pJ/bit, which was suitable for sub-pJ low energy TRNGs.

In this paper, the spurious modes and quality-factor (Q) values of the one-port dual-mode AlN lamb-wave resonators at 500-1000 MHz were studied by theoretical analysis and experimental verification. Through finite element analysis, we found that optimizing the width of the lateral reflection boundary at both ends of the resonator to reach the quarter wavelength (λ/4), which can improve its spectral purity and shift its resonant frequency. The designed resonators were micro-fabricated by using lithography processes on a 6-inch wafer. The measured results show that the spurious mode can be converted and dissipated, splitting into several longitudinal modes by optimizing the width of the lateral reflection boundary, which are consistent well with the theoretical analysis. Similarly, optimizing the interdigital transducer (IDT) width and number of IDT fingers can also suppress the resonator's spurious modes. In addition, it is found that there is no significant difference in the Qs value for the two modes of the dual-mode resonator with the narrow anchor and full anchor. The acoustic wave leaked from the anchor into the substrate produces a small displacement, and the energy is limited in the resonator. Compared to the resonator with Au IDTs, the resonator with Al IDTs can achieve a higher Q value due to its lower thermo-elastic damping loss. The measured results show the optimized dual-mode lamb-wave resonator can obtain Qs value of 2946.3 and 2881.4 at 730.6 MHz and 859.5 MHz, Qp values of 632.5 and 1407.6, effective electromechanical coupling coefficient (k2eff) of 0.73% and 0.11% respectively, and has excellent spectral purity simultaneously.

This paper introduces an inverter-based true random number generator (I-TRNG). It uses a single CMOS inverter to amplify thermal noise multiple times. An adaptive calibration mechanism based on clock tuning provides robust operation across a wide range of supply voltage 0.5∼1.1V and temperature -40∼140°C. An 8-bit Von-Neumann post-processing circuit (VN8W) is implemented for maximum raw entropy extraction. In a 130nm CMOS technology, the I-TRNG entropy source only occupies 635μm2 and consumes 0.016pJ/raw-bit at 0.6V. The I-TRNG occupies 13406μm2, including the entropy source, adaptive calibration circuit, and post-processing circuit. The minimum energy consumption of the I-TRNG is 1.38pJ/bit at 0.5V, while passing all NIST 800-22 and 800-90B tests. Moreover, an equivalent 15-year life at 0.7V, 25°C is confirmed by an accelerated NBTI aging test.