Electrostatic discharge (ESD) events due to metal objects electrified with low voltages give a fatal electromagnetic interference to high-tech information equipment. In order to elucidate the mechanism, with a 6-GHz digital oscilloscope, we previously measured the discharge current due to collision of a hand-held metal piece from a charged human body, and gave a current calculation model. In this study, based on the calculation model, a method was presented for deriving a gap potential gradient from the measured discharge current. Measurements of the discharge currents were made for charge voltages from 200 V to 1000 V. The corresponding potential gradients were estimated, which were validated in comparison with an empirical formula based on the Paschen's law together with other researcher's experimental results.

The very fast transients of micro-gap discharges driven by low voltage electrostatic discharging (ESDs) are investigated in the time domain. We previously developed a 12 GHz wideband measurement setup consisting of a distributed constant line system, however the observed transients due to micro-gap discharges had very fast rise times of 34 ps or less, which reached the limitation on our system. In this paper, we proposed a method for estimating wideband transients beyond the measurement limit by using the transmission loss of a high performance coaxial transmission line. The proposed method is validated by estimating an impulsive voltage waveform with rise/fall time of 16 ps from the waveform measured through a semi-rigid coaxial cable with a length of 10 m.

The characteristics of the Si resonant tunneling metal-oxide-semiconductor transistor (SRTMOST), which has double-barriers at the both edges of the channel, is examined from viewpoints of the substitution for conventional metal-oxide-semiconductor field-effect transistor (MOSFET) in the sub-0.1 µm era. The influence of the double-barriers on the suppression of the drain currents at the gate-off condition is discussed, and the feasibility of the three-valued logic circuit which is composed of the p-MOSFET and the n-SRTMOST is also shown theoretically.

Micro-gap electrostatic discharge (ESD) events due to a human with charge voltages below 1000 V cause serious malfunctions in high-tech information devices. For clarifying such a mechanism, it is indispensable to grasp the spark process of such micro-gap ESDs. For this purpose, two types of spark-resistance laws proposed by Rompe-Weizel and Toepler have often been used, which were derived from the hypotheses that spark conductivity be proportional to the internal energies and charges injected into a spark channel, respectively. However, their validity has not well been verified. To examine which spark-resistance formula could be applied for micro-gap ESDs, with a 12-GHz digital oscilloscope, we previously measured the discharge currents through the hand-held metal piece from a charged human with respect to charged voltages of 200 V and 2000 V, and thereby derived the conductance of a spark gap to reveal that both of their hypotheses are roughly valid in the initial stage of sparks. In this study, to further verify the above spark hypotheses, we derived the discharge voltages in closed forms across a spark gap based on the above spark-resistance formulae, and investigated which spark-resistance formula could be applied for micro-gap ESDs in comparison of spark gaps estimated from the measured discharge currents. As a result, we found that Rompe-Weizel's formula could well explain spark properties for micro-gap ESDs than Toepler's one regardless of charge voltages and approach speeds.

A 1-Gb AG-AND flash memory has been fabricated using 0.13-µm CMOS technology, resulting in a cell area of 0.104 µm2 and a chip area of 95.2 mm2. By applying constant-charge-injection programming and source-line-select programming, a fast page programming time of 600 µs is achieved. The four-bank operation attains a fast programming throughput of 10 MB/s in multilevel flash memories. The compact SRAM write buffers reduce the chip area penalty. A rewrite throughput of 8.3 MB/s is achieved by means of the RAM-write operation during the erase mode.