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[Keyword] 802.11a(43hit)

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  • A Channel Estimation Method for a Highly Mobile OFDM Wireless Access System

    Ryuhei FUNADA  Hiroshi HARADA  Yukiyoshi KAMIO  Shoji SHINODA  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E88-B No:1
      Page(s):
    282-291

    Pilot-symbol-aided (PSA) channel estimation for OFDM wireless access systems enables the periodic estimation of channel frequency response by generating reference data from the received OFDM signals. The accuracy of this channel estimation can be improved through the average over a certain time period in each subcarrier-channel. However, the accuracy of the channel estimates by the average degrades as the Doppler shift is large due to a decrease in the average section size according to the Doppler shift for the tracking of the time-varying channel. This paper proposes a novel PSA channel estimation method to mitigate the influence of the noises and interferences. This method detects the channel estimates affected by the noises and interferences, and then removes them before the arithmetic or harmonic averaging to avoid propagating the influence of the noises and interferences. This paper also evaluated the proposed channel estimation method by clipping log-likelihood ratio (LLR) data to inspect the influence of the channel estimation on the LLR calculation by computer simulation.

  • Performance Improvement of Decision-Directed OFDM Channel Estimation in a Fast Fading Environment

    Ryuhei FUNADA  Hiroshi HARADA  Shoji SHINODA  

     
    PAPER-Signal Processing for Communications

      Vol:
    E87-A No:8
      Page(s):
    1994-2001

    Decision-directed, pilot-symbol-aided channel estimation (PSACE) for coded orthogonal frequency division multiplexing (COFDM) systems has structurally unavoidable processing delay owing to the generation of new reference data. In a fast fading environment, the channel condition which varies during the delay induces channel estimation error. This paper proposes a method of reducing this estimation error. In this method, channel equalization is performed for the received signal twice. One is done as pre-equalization with the delayed estimates of channel frequency response in order to update them periodically. At the same moment, the other is done as post-equalization for the received signal that is delayed by the processing delay time, with the same estimates as the pre-equalization. By the proposed method, more accurate channel estimation can be realized without significant output delay. Computer simulations are performed by utilizing the IEEE 802.11a packet structure of 24 Mbit/s. The result shows that the proposed OFDM transmission scheme having the delay time of 20 µs offers 2.5 dB improvement in the required Eb/N0 at PER = 10-2 in the ESTI-BRAN model C Rayleigh fading channel with fd = 500 Hz.

  • An Equalization Technique for 54 Mbps OFDM Systems

    Naihua YUAN  Anh DINH  Ha H. NGUYEN  

     
    PAPER-Communication Theory and Systems

      Vol:
    E87-A No:3
      Page(s):
    610-618

    A time-domain equalization (TEQ) algorithm is presented to shorten the effective channel impulse response to increase the transmission efficiency of the 54 Mbps IEEE 802.11a orthogonal frequency division multiplexing (OFDM) system. In solving the linear equation Aw = B for the optimum TEQ coefficients, A is shown to be Hermitian and positive definite. The LDLT and LU decompositions are used to factorize A to reduce the computational complexity. Simulation results show high performance gains at a data rate of 54 Mbps with moderate orders of TEQ finite impulse response (FIR) filter. The design and implementation of the algorithm in field programmable gate array (FPGA) are also presented. The regularities among the elements of A are exploited to reduce hardware complexity. The LDLT and LU decompositions are combined in hardware design to find the TEQ coefficients in less than 4 µs. To compensate the effective channel impulse response, a radix-4 pipeline fast Fourier transform (FFT) is implemented in performing zero forcing equalization. The hardware implementation information is provided and simulation results are compared to mathematical values to verify the functionalities of the chips running at 54 Mbps.

41-43hit(43hit)