The data rate of VLSI interconnections has been increasing according to the demand for high-speed operation of semiconductors such as CPUs. To realize high performance VLSI systems, high-speed data communication has become an important factor. However, at high-speed data rates, it is difficult to achieve accurate communication without bit errors because of inter-symbol interference (ISI). This paper presents high-speed data communication techniques for VLSI systems using Tomlinson-Harashima Precoding (THP). Since THP can eliminate the ISI with limiting average and peak power of transmitter signaling, THP is suitable for implementing advanced low-voltage VLSI systems. In this paper, 4-PAM (Pulse amplitude modulation) with THP has been employed to achieve high-speed data communication in VLSI systems. Simulation results show that THP can remove the ISI without increasing peak and average power of a transmitter. Moreover, simulation results clarify that multiple-valued data communication is very effective to reduce implementation costs for realizing high-speed serial links.

This paper investigates multiple-valued code-division multiple access (MV-CDMA) techniques and circuits for intra/inter-chip communication to achieve efficient data transmission in VLSI systems. To address the problems caused by interconnection complexity, we transmit multiplexed signals inside LSI systems employing pseudo-random orthogonal m-sequences as information carriers. A new class of multiple-valued CDMA techniques for intra-chip communication is discussed to demonstrate the feasibility of eliminating co-channel interference caused by a propagation delay of signals, e.g., clock skew. This paper describes the circuit configuration and performance evaluation of MV-CDMA systems for intra-chip communication. We first explain the principle of MV-CDMA technique, and then propose a bidirectional current-mode CMOS technique to realize compact correlation circuits for CDMA. Finally, we show the Spice and MATLAB simulation results of MV-CDMA systems, which indicate the excellent capabilities of eliminating co-channel interference.

This paper proposes applications of a code-division multiplexing technique to VLSI systems free from interconnection problems. We employ a pseudo-random orthogonal m-sequence carrier as a multiplexable information carrier to achieve efficient data transmission. Using orthogonal property of m-sequences, we can multiplex several computational activities into a single circuit, and execute in parallel using multiplexed data transmission with reduced interconnection. Also, randomness of m-sequences offers the high tolerance to interference (jamming), and suppression of dynamic range of signals while maintaining a sufficient signal-to-noise ratio (SNR). We demonstrate application examples of multiplex computing circuits, neural networks, and spread-spectrum image processing to show the advantages.