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A CMOS current-mode companding divider is presented. Currents of both dividend and divisor are compressed into log-domain. Then the logarithm current of divisor is subtracted from the logarithm current of dividend. After expanding the subtraction result, the division function could be achieved. The simulation results indicate that the proposed divider has with good performance at only 1.8 V supply voltage.
A companding technique using the hyperbolic tangent transform is proposed for reducing the peak-to-average-power ratio (PAPR) of orthogonal frequency division multiplexing (OFDM) signals. This technique is practical and can be implemented easily in integrated circuit design. The PAPR value of an OFDM system and the optimal companding coefficient to attain the minimum quantization error are derived. Error probability performance of the system after the companding is evaluated. Our simulation results exhibits that the system with the suggested scheme has nearly the same performance as the systems with the µ-law or A-law companding techniques.
Ippei AKITA Kazuyuki WADA Yoshiaki TADOKORO
A scheme for a low-voltage CMOS syllabic-companding log domain filter with wide dynamic range is proposed and its prototype is presented. A nodal voltage which is fixed in a conventional filter based on the dynamically adjustable biasing (DAB) technique is adapted for change of input envelope to achieve wide dynamic range. Externally linear and time invariant (ELTI) relation between an input and an output is guaranteed by a state variable correction (SVC) circuit which is also proposed for low-voltage operation. To demonstrate the proposed scheme, a fifth-order Chebychev low-pass filter with 100-kHz cutoff frequency is designed and fabricated in a standard 0.35-µm CMOS process. The filter has a 78-dB dynamic range and consumes 200-µW power from a 0.8-V power supply.
ShaoWei WENG Yao ZHAO Jeng-Shyang PAN
A reversible data hiding scheme based on the companding technique and the difference expansion (DE) of triplets is proposed in this paper. The companding technique is employed to increase the number of the expandable triplets. The capacity consumed by the location map recording the expanded positions is largely decreased. As a result, the hiding capacity is considerably increased. The experimental results reveal that high hiding capacity can be achieved at low embedding distortion.
Young Woo LEE Sang Min LEE Yoon Sang JI Jong Shill LEE Young Joon CHEE Sung Hwa HONG Sun I. KIM In Young KIM
Digital hearing aid users often complain of difficulty in understanding speech in the presence of background noise. To improve speech perception in a noisy environment, various speech enhancement algorithms have been applied in digital hearing aids. In this study, a speech enhancement algorithm using modified spectral subtraction and companding is proposed for digital hearing aids. We adjusted the biases of the estimated noise spectrum, based on a subtraction factor, to decrease the residual noise. Companding was applied to the channel of the formant frequency based on the speech presence indicator to enhance the formant. Noise suppression was achieved while retaining weak speech components and avoiding the residual noise phenomena. Objective and subjective evaluation under various environmental conditions confirmed the improvement due to the proposed algorithm. We tested segmental SNR and Log Likelihood Ratio (LLR), which have higher correlation with subjective measures. Segmental SNR has the highest and LLR the lowest correlation of the methods tested. In addition, we confirmed by spectrogram that the proposed method significantly reduced the residual noise and enhanced the formants. A mean opinion score that represented the global perception score was tested; this produced the highest quality speech using the proposed method. The results show that the proposed speech enhancement algorithm is beneficial for hearing aid users in noisy environments.
Ippei AKITA Kazuyuki WADA Yoshiaki TADOKORO
This paper proposes a synthesis method of all low-voltage CMOS instantaneous-companding log domain integrators. The method is based on the exhaustive search of all low-voltage CMOS instantaneous-companding log domain integrators. All the integrators are derived from a general block diagram. A function of each block can be realized by any of a family of circuits and elemental circuits chosen from such families are combined to build an integrator. It is clarified that each family contains a few circuit topologies. All topologies of integrators including new ones are obtained from combinational procedure. Comparing characteristics of all generated integrators, ones satisfying required performances are found out.
Osamu TAKYU Tomoaki OHTSUKI Masao NAKAGAWA
This paper proposes a novel compressing and expanding (companding) system for OFDM wireless communications that minimizes the compression distortion and so reduces the peak power of OFDM symbols. OFDM systems suffer from large variations in instantaneous peak power. Such transients distort the signals when they are passed through a nonlinear high power amplifier (HPA) prior to transmission. Existing companding systems are far from perfect since the receiver can not accurately estimate the degree of compression applied by the transmitter and thus can not regenerate the original signal by expansion; the key problems are the band pass filter (BPF), HPA, and the noise component enhanced by the channel compensation filter. In the proposed companding system, each symbol is divided into segments, and series of consecutive segments are grouped into clusters. Each cluster is multiplied by a weight equal to the inverse of the largest instantaneous power within the cluster. The receiver estimates the weight used for each time cluster. The weights for all clusters are averaged to mitigate the weight estimation error. As a result, the proposed expander can accurately estimate the weights used and thus well suppress the compression distortion.
Nobukazu TAKAI Ken-ichi TAKANO Shigetaka TAKAGI Nobuo FUJII
In current-mode signal processing, a companding integrator is attractive from the viewpoint of linearity under a low power supply voltage. In this paper, new instantaneous companding integrators using MOSFET's are proposed. The companding integrator utilizes a nature of MOSFET square law. HSPICE simulation results demonstrate several advantages of the proposed circuits.