A new method for simulation of etching and deposition processes has been developed. This method is based on fundamental morphological operations derived from image and signal processing. As the material surface during simulation moves in time, the geometry either increases or decreases. If the simulation geometry is considered as a two-valued image (material or vacuum), etching and deposition processes can be simulated by means of the erosion and dilation operation. Together with a cellular material representation this method allows an accurate and stable simulation of three-dimensional arbitrary structures. Simulation results for several etching and deposition problems demonstrate accuracy and generality of our method.

Embossed disks with discrete magnetic tracks and servo marks are proposed and evaluated. The tracks and the servo marks are made by etching the glass substrate. The guard band depth was decided to be 0.2 µm. Using the disks, the head positioning accuracy of 0.09µm (rms) and the recording density of 192 tracks per millimeter were demonstrated.

A Pt-based gate and photochemical dry etching were developed to fabricate N-InAlAs/InGaAs HEMT ICs. The N-InAlAs/Pt contact showed a Schottky barrier at 0.82 eV, about 0.3 eV larger than ΔEc, and nearly ideal I-V characteristics. Its main disadvantage was the excess penetration of Pt into InAlAs. We proposed a thin-Pt/Ti/Au multilayer gate, more thermally stable than the thick-Pt gate, where Ti layer suppresses the above problem with Pt. The multilayer gate also showed a Schottky barrier (φ) of 0.83 eV and an edeality dactor of 1.1. The high φ value makes it possible to fabricate an E-mode N-InAlAs/InGaAs HEMT. We also developed photochemical selective dry etching using CH3Br gas and a low-pressure mercury lamp. The etching selectivity was 25 at an etch rate of 17 nm/min for InGaAs and 0.7 nm/min for InAlAs. The 1.2-µm-gate E-mode HEMT fabricated using the Pt-based gate and photochemical etching had an excellent peak transconductance of 620 mS/mm with a threshold voltage of +0.03 V. The standard deviation of the threshold voltage of E-mode HEMTs on a 2-inch wafer was 20 mV at an average of +0.088 V. These results indicate the effectiveness of the Pt-based gate and photochemical etching for fabricating N-InAlAs/InGaAs HEMT ICs.

Plasmaless etching using ClF3 gas has been investigated on nitride films with different composition. For the sputter deposited and thermally grown silicon nitride films containing no hydrogen, the etch rate increases and the activation energy decreases with increase of the composition ratio of silicon to nitrogen between 0.75 and 1.3. This fact indicates that the etching is likely to proceed through the reaction between Si and ClF3. The native oxide on the silicon-nitride films can also be removed with ClF3 gas. Ultra-violet light irradiation from a low pressure mercury lamp remarkably accelerates the removal of the native oxide and the etch rate of the thermally grown silicon-nitride films. For the plasma deposited films, the etch rate is strongly accelerate with increasing hydrogen content in the films, but the activation energy hardly depends on the bounded hydrogen in the films, consistent with the results for Si etching.