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Koichi TANNO Kiminobu SATO Hisashi TANAKA Okihiko ISHIZUKA
In this letter, we propose a sample and hold circuit (S/H circuit) with the clock boost technique and the input signal tracking technique. The proposed circuit block generates the clock with the amplitude of VDD + vin, and the clock is used to control the MOS switch. By applying this circuit to a S/H circuit, we can deal with the rail-to-rail signal with maintaining low distortion. Furthermore, the hold error caused by the charge injection and the clock feedthrough can be also reduced by using the dummy switch. The Star-HSPICE simulation results are reported in this letter.
Fujihiko MATSUMOTO Hiroki WASAKI Yasuaki NOGUCHI
This paper proposes design of new linear bipolar OTAs using hyperbolic circuits with an intermediate voltage terminal. Four types of the OTAs are presented; two OTAs contain a hyperbolic sine circuit and the other two OTAs employ a hyperbolic cosine circuit. The linear input voltage range of the proposed OTAs is wider than that of the well-known conventional OTA, multi-TANH doublet, while each proposed OTA has advantages, such as low power dissipation, high-frequency characteristics and so on. The results of SPICE simulation show that satisfactory characteristics are obtained.