This paper deals with the problem of minimizing roundoff noise and pole sensitivity simultaneously subject to l2-scaling constraints for state-space digital filters. A novel measure for evaluating roundoff noise and pole sensitivity is proposed, and an efficient technique for minimizing this measure by jointly optimizing state-space realization and error feedback is explored, namely, the constrained optimization problem at hand is converted into an unconstrained problem and then the resultant problem is solved by employing a quasi-Newton algorithm. A numerical example is presented to demonstrate the validity and effectiveness of the proposed technique.

Block-state realization of state-space digital filters offers reduced implementation complexity relative to canonical state-space filters while filter's internal structure remains accessible. In this paper, we present a quantitative analysis on l2 coefficient sensitivity of block-state digital filters. Based on this, we develop two techniques for minimizing average l2-sensitivity subject to l2-scaling constraints. One of the techniques is based on a Lagrange function and some matrix-theoretic techniques. The other solution method converts the problem at hand into an unconstrained optimization problem which is solved by using an efficient quasi-Newton algorithm where the key gradient evaluation is done in closed-form formulas for fast and accurate execution of quasi-Newton iterations. A case study is presented to demonstrate the validity and effectiveness of the proposed techniques.

This letter proposes closed form solutions to the L2-sensitivity minimization of second-order state-space digital filters with real poles. We consider two cases of second-order digital filters: distinct real poles and multiple real poles. In case of second-order digital filters, we can express the L2-sensitivity of second-order digital filters by a simple linear combination of exponential functions and formulate the L2-sensitivity minimization problem by a simple polynomial equation. As a result, the minimum L2-sensitivity realizations can be synthesized by only solving a fourth-degree polynomial equation, which can be analytically solved.

This paper proposes a closed form solution to L2-sensitivity minimization of second-order state-space digital filters subject to L2-scaling constraints. The proposed approach reduces the constrained optimization problem to an unconstrained optimization problem by appropriate variable transformation. Furthermore, restricting ourselves to the case of second-order state-space digital filters, we can express the L2-sensitivity by a simple linear combination of exponential functions and formulate the L2-sensitivity minimization problem by a simple polynomial equation. As a result, L2-sensitivity is expressed in closed form, and its minimization subject to L2-scaling constraints is achieved without iterative calculations.

This paper proposes a closed form solution to L2-sensitivity minimization of second-order state-space digital filters. Restricting ourselves to the second-order case of state-space digital filters, we can express the L2-sensitivity by a simple linear combination of exponential functions and formulate the L2-sensitivity minimization problem by a simple polynomial equation. As a result, the L2-sensitivity minimization problem can be converted into a problem to find the solution to a fourth-degree polynomial equation of constant coefficients, which can be algebraically solved in closed form without iterative calculations.

The minimization problem of an L2-sensitivity measure subject to L2-norm dynamic-range scaling constraints is formulated for a class of two-dimensional (2-D) state-space digital filters. First, the problem is converted into an unconstrained optimization problem by using linear-algebraic techniques. Next, the unconstrained optimization problem is solved by applying an efficient quasi-Newton algorithm with closed-form formula for gradient evaluation. The coordinate transformation matrix obtained is then used to synthesize the optimal 2-D state-space filter structure that minimizes the L2-sensitivity measure subject to L2-norm dynamic-range scaling constraints. Finally, a numerical example is presented to illustrate the utility of the proposed technique.

This letter presents an efficient design method of multiplierless 2-D state-space digital filters (SSDFs) based on a genetic algorithm. The resultant multiplierless 2-D SSDFs, whose coefficients are represented as the sum of two powers-of-two terms, are attractive for high-speed operation and simple implementation. The design problem of multiplierless 2-D SSDFs described by Roesser's local state-space model is formulated subject to the constraint that the resultant filters are stable. To ensure the stability for the resultant 2-D SSDFs, a stability test routine is embedded in th design procedure.

This paper proposes high-performance multiprocessor implementation for real-time one-dimensional (1-D) statespace digital filters (SSDFs). The block-state realization of SSDFs (BSRDF) is suitable for their high speed realization and gives the characteristics of high accuracy. Previously we proposed a VLSI-oriented highly parallel architecture for BSRDF. For the purpose of speeding up and reducing hardware complexity, the distributed arithmetic, of which processing time depends only on word length, is applied to this architecture. It is implemented as a 2-D SIMD processor array, and the processor consists of n homogeneous processing elements (PEs), n being filter order. The high sampling rate of one or more hundred MHz becomes possible for high filter order. Moreover, the number of I/O data per processor can be a small fixed value for any filter order, and the number of gates can also be smaller than that in the case of using multiplier. Consequently, this proposed system can be implemented easily even in the present VLSI environment.

This paper designs and evaluates highly parallel VLSI processors for real time 2-D state-space digital filters using hierarchical behavioral description language and synthesizer. The architecture of the 2-D state-space digital filtering system is a linear systolic array of homogeneous VLSI processors, each of which consists of eight processing elements (PEs) executing 1-D state-space digital filtering with multi-input and multi-output. Hierarchical behavioral description language and synthesizer are adopted to design and evaluate PE's and the VLSI processors. One 16 bit fixed-point PE executing a (4, 4)-th order 2-D state-space digital filtering is described on the basis of distributed arithmetic in about 1,200 steps by the description language and is composed of 15 K gates in terms of 2 input NAND gate. One VLSI processor which is a cascade connection of eight PEs is composed of 129 K gates and can be integrated into one 1515 [mm2] VLSI chip using 1 µm CMOS standard cell. The 2-D state-space digital filtering system composed of 128 VLSI processors at 25 MHz clock can execute a 1,0241,024 image in 1.47 [msec] and thus can be applied to real-time conventional video signal processing.