A 1-V Cyclic A/D Converter Using FD-SOI Sample/Hold Circuits for Sensor Networks
Summary :
A cyclic A/D conversion circuit technique for sensor networks has been developed using 0.2-µm CMOS/FD-SOI technology. The FD-SOI analog switches can lower the supply voltage without degrading accuracy because of their negligible body effect. The proposed A/D converter achieves operation at the supply voltage of 1 V or less and can handle a sampling frequency ranging from 8 Sps to 8 kSps with a new clocking technique.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E88-C No.4 pp.479-483
- Publication Date
- 2005/04/01
- Publicized
- Online ISSN
- DOI
- 10.1093/ietele/e88-c.4.479
- Type of Manuscript
- Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP)
- Category
- Analog
Authors
Keyword
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Jun TERADA, Yasuyuki MATSUYA, Shin'ichiro MUTOH, Yuichi KADO, "A 1-V Cyclic A/D Converter Using FD-SOI Sample/Hold Circuits for Sensor Networks" in IEICE TRANSACTIONS on Electronics,
vol. E88-C, no. 4, pp. 479-483, April 2005, doi: 10.1093/ietele/e88-c.4.479.
Abstract: A cyclic A/D conversion circuit technique for sensor networks has been developed using 0.2-µm CMOS/FD-SOI technology. The FD-SOI analog switches can lower the supply voltage without degrading accuracy because of their negligible body effect. The proposed A/D converter achieves operation at the supply voltage of 1 V or less and can handle a sampling frequency ranging from 8 Sps to 8 kSps with a new clocking technique.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e88-c.4.479/_p
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@ARTICLE{e88-c_4_479,
author={Jun TERADA, Yasuyuki MATSUYA, Shin'ichiro MUTOH, Yuichi KADO, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 1-V Cyclic A/D Converter Using FD-SOI Sample/Hold Circuits for Sensor Networks},
year={2005},
volume={E88-C},
number={4},
pages={479-483},
abstract={A cyclic A/D conversion circuit technique for sensor networks has been developed using 0.2-µm CMOS/FD-SOI technology. The FD-SOI analog switches can lower the supply voltage without degrading accuracy because of their negligible body effect. The proposed A/D converter achieves operation at the supply voltage of 1 V or less and can handle a sampling frequency ranging from 8 Sps to 8 kSps with a new clocking technique.},
keywords={},
doi={10.1093/ietele/e88-c.4.479},
ISSN={},
month={April},}
Copy
TY - JOUR
TI - A 1-V Cyclic A/D Converter Using FD-SOI Sample/Hold Circuits for Sensor Networks
T2 - IEICE TRANSACTIONS on Electronics
SP - 479
EP - 483
AU - Jun TERADA
AU - Yasuyuki MATSUYA
AU - Shin'ichiro MUTOH
AU - Yuichi KADO
PY - 2005
DO - 10.1093/ietele/e88-c.4.479
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E88-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2005
AB - A cyclic A/D conversion circuit technique for sensor networks has been developed using 0.2-µm CMOS/FD-SOI technology. The FD-SOI analog switches can lower the supply voltage without degrading accuracy because of their negligible body effect. The proposed A/D converter achieves operation at the supply voltage of 1 V or less and can handle a sampling frequency ranging from 8 Sps to 8 kSps with a new clocking technique.
ER -
English
