Design and Simulation of Asymmetric MOSFETs
Summary :
A novel asymmetric MOSFET with no LDD on the source side is simulated on bulk-Si using a device simulator (SILVACO). In order to overcome the problems of the conventional asymmetric process, a novel asymmetric MOSFET using mesa structure and sidewall spacer gate is proposed which provides self-alignment process, aggressive scaling, and uniformity. First of all, we have simulated to compare the characteristics between asymmetric and symmetric MOSFETs. Basically, both asymmetric and symmetric MOSFETs have an n-type channel (25-nm) and the same physical parameters. When we compare this with the 25-nm symmetric MOSFET, the proposed asymmetric MOSFET shows better device performances.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E90-C No.5 pp.978-982
- Publication Date
- 2007/05/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1093/ietele/e90-c.5.978
- Type of Manuscript
- Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
- Category
- Junction Formation and TFT Reliability
Authors
Keyword
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Jong Pil KIM, Woo Young CHOI, Jae Young SONG, Seongjae CHO, Sang Wan KIM, Jong Duk LEE, Byung-Gook PARK, "Design and Simulation of Asymmetric MOSFETs" in IEICE TRANSACTIONS on Electronics,
vol. E90-C, no. 5, pp. 978-982, May 2007, doi: 10.1093/ietele/e90-c.5.978.
Abstract: A novel asymmetric MOSFET with no LDD on the source side is simulated on bulk-Si using a device simulator (SILVACO). In order to overcome the problems of the conventional asymmetric process, a novel asymmetric MOSFET using mesa structure and sidewall spacer gate is proposed which provides self-alignment process, aggressive scaling, and uniformity. First of all, we have simulated to compare the characteristics between asymmetric and symmetric MOSFETs. Basically, both asymmetric and symmetric MOSFETs have an n-type channel (25-nm) and the same physical parameters. When we compare this with the 25-nm symmetric MOSFET, the proposed asymmetric MOSFET shows better device performances.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e90-c.5.978/_p
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@ARTICLE{e90-c_5_978,
author={Jong Pil KIM, Woo Young CHOI, Jae Young SONG, Seongjae CHO, Sang Wan KIM, Jong Duk LEE, Byung-Gook PARK, },
journal={IEICE TRANSACTIONS on Electronics},
title={Design and Simulation of Asymmetric MOSFETs},
year={2007},
volume={E90-C},
number={5},
pages={978-982},
abstract={A novel asymmetric MOSFET with no LDD on the source side is simulated on bulk-Si using a device simulator (SILVACO). In order to overcome the problems of the conventional asymmetric process, a novel asymmetric MOSFET using mesa structure and sidewall spacer gate is proposed which provides self-alignment process, aggressive scaling, and uniformity. First of all, we have simulated to compare the characteristics between asymmetric and symmetric MOSFETs. Basically, both asymmetric and symmetric MOSFETs have an n-type channel (25-nm) and the same physical parameters. When we compare this with the 25-nm symmetric MOSFET, the proposed asymmetric MOSFET shows better device performances.},
keywords={},
doi={10.1093/ietele/e90-c.5.978},
ISSN={1745-1353},
month={May},}
Copy
TY - JOUR
TI - Design and Simulation of Asymmetric MOSFETs
T2 - IEICE TRANSACTIONS on Electronics
SP - 978
EP - 982
AU - Jong Pil KIM
AU - Woo Young CHOI
AU - Jae Young SONG
AU - Seongjae CHO
AU - Sang Wan KIM
AU - Jong Duk LEE
AU - Byung-Gook PARK
PY - 2007
DO - 10.1093/ietele/e90-c.5.978
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E90-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2007
AB - A novel asymmetric MOSFET with no LDD on the source side is simulated on bulk-Si using a device simulator (SILVACO). In order to overcome the problems of the conventional asymmetric process, a novel asymmetric MOSFET using mesa structure and sidewall spacer gate is proposed which provides self-alignment process, aggressive scaling, and uniformity. First of all, we have simulated to compare the characteristics between asymmetric and symmetric MOSFETs. Basically, both asymmetric and symmetric MOSFETs have an n-type channel (25-nm) and the same physical parameters. When we compare this with the 25-nm symmetric MOSFET, the proposed asymmetric MOSFET shows better device performances.
ER -
English
