It is an innovative idea for modern PLL generation to control the bandwidth proportionally to the reference frequency. Recently, a frequency of the operating clock in microprocessors has been required to be changed frequently and widely in order to manage power consumption and throughput. A new compact switched capacitor (SC) filter which has fully flat response has been developed for adaptive biased PLLs. We have also developed a new digital control method for achieving the wider frequency range. The measured performances of the test chip were good enough for the use in the microprocessors.
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Shiro DOSHO, Naoshi YANAGISAWA, Kazuaki SOGAWA, Yuji YAMADA, Takashi MORIE, "An Ultra-Wide Range Digitally Adaptive Control Phase Locked Loop with New 3-Phase Switched Capacitor Loop Filter" in IEICE TRANSACTIONS on Electronics,
vol. E90-C, no. 6, pp. 1197-1202, June 2007, doi: 10.1093/ietele/e90-c.6.1197.
Abstract: It is an innovative idea for modern PLL generation to control the bandwidth proportionally to the reference frequency. Recently, a frequency of the operating clock in microprocessors has been required to be changed frequently and widely in order to manage power consumption and throughput. A new compact switched capacitor (SC) filter which has fully flat response has been developed for adaptive biased PLLs. We have also developed a new digital control method for achieving the wider frequency range. The measured performances of the test chip were good enough for the use in the microprocessors.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e90-c.6.1197/_p
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@ARTICLE{e90-c_6_1197,
author={Shiro DOSHO, Naoshi YANAGISAWA, Kazuaki SOGAWA, Yuji YAMADA, Takashi MORIE, },
journal={IEICE TRANSACTIONS on Electronics},
title={An Ultra-Wide Range Digitally Adaptive Control Phase Locked Loop with New 3-Phase Switched Capacitor Loop Filter},
year={2007},
volume={E90-C},
number={6},
pages={1197-1202},
abstract={It is an innovative idea for modern PLL generation to control the bandwidth proportionally to the reference frequency. Recently, a frequency of the operating clock in microprocessors has been required to be changed frequently and widely in order to manage power consumption and throughput. A new compact switched capacitor (SC) filter which has fully flat response has been developed for adaptive biased PLLs. We have also developed a new digital control method for achieving the wider frequency range. The measured performances of the test chip were good enough for the use in the microprocessors.},
keywords={},
doi={10.1093/ietele/e90-c.6.1197},
ISSN={1745-1353},
month={June},}
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TY - JOUR
TI - An Ultra-Wide Range Digitally Adaptive Control Phase Locked Loop with New 3-Phase Switched Capacitor Loop Filter
T2 - IEICE TRANSACTIONS on Electronics
SP - 1197
EP - 1202
AU - Shiro DOSHO
AU - Naoshi YANAGISAWA
AU - Kazuaki SOGAWA
AU - Yuji YAMADA
AU - Takashi MORIE
PY - 2007
DO - 10.1093/ietele/e90-c.6.1197
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E90-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2007
AB - It is an innovative idea for modern PLL generation to control the bandwidth proportionally to the reference frequency. Recently, a frequency of the operating clock in microprocessors has been required to be changed frequently and widely in order to manage power consumption and throughput. A new compact switched capacitor (SC) filter which has fully flat response has been developed for adaptive biased PLLs. We have also developed a new digital control method for achieving the wider frequency range. The measured performances of the test chip were good enough for the use in the microprocessors.
ER -