This paper describes a new biasing scheme for sensing circuits, namely an automated bias control (ABC) circuit, for high-performance VLSI's. The ABC circuit can automatically gear the output level of sensing circuits to the input threshold voltage of the succeeding CMOS converters. The sensing performance can be accelerated with the ABC circuit either by reducing excessive signal level margin between the sensing circuits and the CMOS converters or by reducing extra stage of signal amplification. Since feedback control of the ABC circuit ensures a correct dc biasing even under large process deviation and circuit condition changes, wider operation margin can also be obtained. Three successful applications of the ABC circuit are reported: a sense amplifier, an address transition detector (ATD), and an ECL-CMOS input buffer. A 64-kb BiCMOS SRAM employing the proposed sense amplifier and the ATD has been fabricated with a 0.8-µm 9-GHz BiCMOS technology. The SRAM has an address access time of 4.5 ns.
Tadahiro KURODA
Toshiyuki FUKUNAGA
Kenji MATSUO
Kazuhiko KASAI
Ayako HIRATA
Shinji FUJII
Masahiro KIMURA
Hiroaki SUZUKI
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Tadahiro KURODA, Toshiyuki FUKUNAGA, Kenji MATSUO, Kazuhiko KASAI, Ayako HIRATA, Shinji FUJII, Masahiro KIMURA, Hiroaki SUZUKI, "Automated Bias Control (ABC) Circuit for High-Performance VLSI's" in IEICE TRANSACTIONS on Electronics,
vol. E75-C, no. 4, pp. 539-546, April 1992, doi: .
Abstract: This paper describes a new biasing scheme for sensing circuits, namely an automated bias control (ABC) circuit, for high-performance VLSI's. The ABC circuit can automatically gear the output level of sensing circuits to the input threshold voltage of the succeeding CMOS converters. The sensing performance can be accelerated with the ABC circuit either by reducing excessive signal level margin between the sensing circuits and the CMOS converters or by reducing extra stage of signal amplification. Since feedback control of the ABC circuit ensures a correct dc biasing even under large process deviation and circuit condition changes, wider operation margin can also be obtained. Three successful applications of the ABC circuit are reported: a sense amplifier, an address transition detector (ATD), and an ECL-CMOS input buffer. A 64-kb BiCMOS SRAM employing the proposed sense amplifier and the ATD has been fabricated with a 0.8-µm 9-GHz BiCMOS technology. The SRAM has an address access time of 4.5 ns.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e75-c_4_539/_p
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@ARTICLE{e75-c_4_539,
author={Tadahiro KURODA, Toshiyuki FUKUNAGA, Kenji MATSUO, Kazuhiko KASAI, Ayako HIRATA, Shinji FUJII, Masahiro KIMURA, Hiroaki SUZUKI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Automated Bias Control (ABC) Circuit for High-Performance VLSI's},
year={1992},
volume={E75-C},
number={4},
pages={539-546},
abstract={This paper describes a new biasing scheme for sensing circuits, namely an automated bias control (ABC) circuit, for high-performance VLSI's. The ABC circuit can automatically gear the output level of sensing circuits to the input threshold voltage of the succeeding CMOS converters. The sensing performance can be accelerated with the ABC circuit either by reducing excessive signal level margin between the sensing circuits and the CMOS converters or by reducing extra stage of signal amplification. Since feedback control of the ABC circuit ensures a correct dc biasing even under large process deviation and circuit condition changes, wider operation margin can also be obtained. Three successful applications of the ABC circuit are reported: a sense amplifier, an address transition detector (ATD), and an ECL-CMOS input buffer. A 64-kb BiCMOS SRAM employing the proposed sense amplifier and the ATD has been fabricated with a 0.8-µm 9-GHz BiCMOS technology. The SRAM has an address access time of 4.5 ns.},
keywords={},
doi={},
ISSN={},
month={April},}
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TY - JOUR
TI - Automated Bias Control (ABC) Circuit for High-Performance VLSI's
T2 - IEICE TRANSACTIONS on Electronics
SP - 539
EP - 546
AU - Tadahiro KURODA
AU - Toshiyuki FUKUNAGA
AU - Kenji MATSUO
AU - Kazuhiko KASAI
AU - Ayako HIRATA
AU - Shinji FUJII
AU - Masahiro KIMURA
AU - Hiroaki SUZUKI
PY - 1992
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E75-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 1992
AB - This paper describes a new biasing scheme for sensing circuits, namely an automated bias control (ABC) circuit, for high-performance VLSI's. The ABC circuit can automatically gear the output level of sensing circuits to the input threshold voltage of the succeeding CMOS converters. The sensing performance can be accelerated with the ABC circuit either by reducing excessive signal level margin between the sensing circuits and the CMOS converters or by reducing extra stage of signal amplification. Since feedback control of the ABC circuit ensures a correct dc biasing even under large process deviation and circuit condition changes, wider operation margin can also be obtained. Three successful applications of the ABC circuit are reported: a sense amplifier, an address transition detector (ATD), and an ECL-CMOS input buffer. A 64-kb BiCMOS SRAM employing the proposed sense amplifier and the ATD has been fabricated with a 0.8-µm 9-GHz BiCMOS technology. The SRAM has an address access time of 4.5 ns.
ER -