This paper describes a new biasing scheme for sensing circuits, namely an automated bias control (ABC) circuit, for high-performance VLSI's. The ABC circuit can automatically gear the output level of sensing circuits to the input threshold voltage of the succeeding CMOS converters. The sensing performance can be accelerated with the ABC circuit either by reducing excessive signal level margin between the sensing circuits and the CMOS converters or by reducing extra stage of signal amplification. Since feedback control of the ABC circuit ensures a correct dc biasing even under large process deviation and circuit condition changes, wider operation margin can also be obtained. Three successful applications of the ABC circuit are reported: a sense amplifier, an address transition detector (ATD), and an ECL-CMOS input buffer. A 64-kb BiCMOS SRAM employing the proposed sense amplifier and the ATD has been fabricated with a 0.8-µm 9-GHz BiCMOS technology. The SRAM has an address access time of 4.5 ns.

A procedure for preparing a cross-sectional transmission electron microscopy (TEM) micrograph of a specific area is outlined. A specific area in a specimen has been very difficult to observe with TEM, because a particular small area cannot be preselected in the conventional specimen preparation technique using mechanical polishing, dimpling and ion milling. The technique in this paper uses a focused ion beam (FIB) to fabricate a cross-sectional specimen at a desired area. The applications of this specimen preparation technique are illustrated for investigations of particles in the process of fabricating devices and degraded aluminum/aluminum vias. The specimen preparation technique using FIB is useful for observing a specific area. This technique is also useful for shortening the time of specimen preparation and observing wide areas of LSI devices.

A new observation technique for process-induced micro-defects in ULSI using a combination of anodic oxidation and chemical removal of the oxide has been developed. Enhanced oxidation has occurred at the defect region due to the stress field and then craterlike delineation has been formed after oxide removal. AFM and SEM observation of the micro-defects induced by ion implantation and applications using this tech-nique to the failure analysis of MOS device fabrication are presented.