Design and Evaluation of a 4-Valued Universal-Literal CAM for Cellular Logic Image Processing

Takahiro HANYU; Manabu ARAKAKI; Michitaka KAMEYAMA

Design and Evaluation of a 4-Valued Universal-Literal CAM for Cellular Logic Image Processing

Takahiro HANYU, Manabu ARAKAKI, Michitaka KAMEYAMA

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This paper presents a 4-valued content-addressable memory (CAM) for fully parallel template-matching operations in real-time cellular logic image processing with fixed templates. A universal literal is essential to perform a multiple-valued template-matching operation. It is decomposed of a pair of a threshold operation in a CAM cell and a logic-value conversion shared by CAM cells in the same column of a CAM cellular array, which makes a CAM cell function simple. Since a threshold operation together with a 4-valued storage element can be designed by using a single floating-gate MOS transistor, a high-density 4-valued universal-literal CAM with a single-transistor cell can be implemented by using a multi-layer interconnection technology. It is demonstrated that the performance of the proposed CAM is much superior to that of conventional CAMs under the same function.

Publication: IEICE TRANSACTIONS on Electronics Vol.E80-C No.7 pp.948-955

Publication Date: 1997/07/25

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Type of Manuscript: Special Section PAPER (Special Issue on New Concept Device and Novel Architecture LSIs)

Category: Multiple-Valued Architectures

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Takahiro HANYU, Manabu ARAKAKI, Michitaka KAMEYAMA, "Design and Evaluation of a 4-Valued Universal-Literal CAM for Cellular Logic Image Processing" in IEICE TRANSACTIONS on Electronics, vol. E80-C, no. 7, pp. 948-955, July 1997, doi: .
Abstract: This paper presents a 4-valued content-addressable memory (CAM) for fully parallel template-matching operations in real-time cellular logic image processing with fixed templates. A universal literal is essential to perform a multiple-valued template-matching operation. It is decomposed of a pair of a threshold operation in a CAM cell and a logic-value conversion shared by CAM cells in the same column of a CAM cellular array, which makes a CAM cell function simple. Since a threshold operation together with a 4-valued storage element can be designed by using a single floating-gate MOS transistor, a high-density 4-valued universal-literal CAM with a single-transistor cell can be implemented by using a multi-layer interconnection technology. It is demonstrated that the performance of the proposed CAM is much superior to that of conventional CAMs under the same function.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e80-c_7_948/_p

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@ARTICLE{e80-c_7_948,
author={Takahiro HANYU, Manabu ARAKAKI, Michitaka KAMEYAMA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Design and Evaluation of a 4-Valued Universal-Literal CAM for Cellular Logic Image Processing},
year={1997},
volume={E80-C},
number={7},
pages={948-955},
abstract={This paper presents a 4-valued content-addressable memory (CAM) for fully parallel template-matching operations in real-time cellular logic image processing with fixed templates. A universal literal is essential to perform a multiple-valued template-matching operation. It is decomposed of a pair of a threshold operation in a CAM cell and a logic-value conversion shared by CAM cells in the same column of a CAM cellular array, which makes a CAM cell function simple. Since a threshold operation together with a 4-valued storage element can be designed by using a single floating-gate MOS transistor, a high-density 4-valued universal-literal CAM with a single-transistor cell can be implemented by using a multi-layer interconnection technology. It is demonstrated that the performance of the proposed CAM is much superior to that of conventional CAMs under the same function.},
keywords={},
doi={},
ISSN={},
month={July},}

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TY - JOUR
TI - Design and Evaluation of a 4-Valued Universal-Literal CAM for Cellular Logic Image Processing
T2 - IEICE TRANSACTIONS on Electronics
SP - 948
EP - 955
AU - Takahiro HANYU
AU - Manabu ARAKAKI
AU - Michitaka KAMEYAMA
PY - 1997
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E80-C
IS - 7
JA - IEICE TRANSACTIONS on Electronics
Y1 - July 1997
AB - This paper presents a 4-valued content-addressable memory (CAM) for fully parallel template-matching operations in real-time cellular logic image processing with fixed templates. A universal literal is essential to perform a multiple-valued template-matching operation. It is decomposed of a pair of a threshold operation in a CAM cell and a logic-value conversion shared by CAM cells in the same column of a CAM cellular array, which makes a CAM cell function simple. Since a threshold operation together with a 4-valued storage element can be designed by using a single floating-gate MOS transistor, a high-density 4-valued universal-literal CAM with a single-transistor cell can be implemented by using a multi-layer interconnection technology. It is demonstrated that the performance of the proposed CAM is much superior to that of conventional CAMs under the same function.
ER -