Single-Chip Implementation of a 32-bit Motor-Drive-Specific Microcontroller with Floating-Point Unit

Jin-Cheon KIM; Sang-Hoon LEE; Joo-Hyun LEE; Do-Young LEE; Won-Chang JUNG; Hong-June PARK; Im-Soo MOK; Hyung-Gyun KIM; Ga-Woo PARK

Single-Chip Implementation of a 32-bit Motor-Drive-Specific Microcontroller with Floating-Point Unit

Jin-Cheon KIM, Sang-Hoon LEE, Joo-Hyun LEE, Do-Young LEE, Won-Chang JUNG, Hong-June PARK, Im-Soo MOK, Hyung-Gyun KIM, Ga-Woo PARK

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A 32-bit motor-drive-specific microcontroller chip was newly designed, implemented using a 0.8 µm double-metal CMOS process, and its feasibility was successfully tested by applying the fabricated microcontroller chip to a real AC induction motor drive system. The microcontroller chip includes a single-precision floating-point unit, peripheral devices for motor drive, and a memory controller as well as the SPARC V7 CPU. The pipeline scheme and the two-step multiplication method were used in the multiplier of floating-point unit for the best area and speed trade-off, using the standard cell library available for the design. The chip size is 12.7 12.8 mm², the number of transistors is around 562,000, and the power consumption is 1.69 W at the supply voltage of 5 V and the clock frequency of 30 MHz. Both a standard cell library and a full-custom layout were used in the implementation.

Publication: IEICE TRANSACTIONS on Electronics Vol.E82-C No.9 pp.1699-1706

Publication Date: 1999/09/25

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Type of Manuscript: Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms)

Category: Processors

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Jin-Cheon KIM, Sang-Hoon LEE, Joo-Hyun LEE, Do-Young LEE, Won-Chang JUNG, Hong-June PARK, Im-Soo MOK, Hyung-Gyun KIM, Ga-Woo PARK, "Single-Chip Implementation of a 32-bit Motor-Drive-Specific Microcontroller with Floating-Point Unit" in IEICE TRANSACTIONS on Electronics, vol. E82-C, no. 9, pp. 1699-1706, September 1999, doi: .
Abstract: A 32-bit motor-drive-specific microcontroller chip was newly designed, implemented using a 0.8 µm double-metal CMOS process, and its feasibility was successfully tested by applying the fabricated microcontroller chip to a real AC induction motor drive system. The microcontroller chip includes a single-precision floating-point unit, peripheral devices for motor drive, and a memory controller as well as the SPARC V7 CPU. The pipeline scheme and the two-step multiplication method were used in the multiplier of floating-point unit for the best area and speed trade-off, using the standard cell library available for the design. The chip size is 12.7 12.8 mm², the number of transistors is around 562,000, and the power consumption is 1.69 W at the supply voltage of 5 V and the clock frequency of 30 MHz. Both a standard cell library and a full-custom layout were used in the implementation.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_9_1699/_p

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@ARTICLE{e82-c_9_1699,
author={Jin-Cheon KIM, Sang-Hoon LEE, Joo-Hyun LEE, Do-Young LEE, Won-Chang JUNG, Hong-June PARK, Im-Soo MOK, Hyung-Gyun KIM, Ga-Woo PARK, },
journal={IEICE TRANSACTIONS on Electronics},
title={Single-Chip Implementation of a 32-bit Motor-Drive-Specific Microcontroller with Floating-Point Unit},
year={1999},
volume={E82-C},
number={9},
pages={1699-1706},
abstract={A 32-bit motor-drive-specific microcontroller chip was newly designed, implemented using a 0.8 µm double-metal CMOS process, and its feasibility was successfully tested by applying the fabricated microcontroller chip to a real AC induction motor drive system. The microcontroller chip includes a single-precision floating-point unit, peripheral devices for motor drive, and a memory controller as well as the SPARC V7 CPU. The pipeline scheme and the two-step multiplication method were used in the multiplier of floating-point unit for the best area and speed trade-off, using the standard cell library available for the design. The chip size is 12.7 12.8 mm², the number of transistors is around 562,000, and the power consumption is 1.69 W at the supply voltage of 5 V and the clock frequency of 30 MHz. Both a standard cell library and a full-custom layout were used in the implementation.},
keywords={},
doi={},
ISSN={},
month={September},}

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TY - JOUR
TI - Single-Chip Implementation of a 32-bit Motor-Drive-Specific Microcontroller with Floating-Point Unit
T2 - IEICE TRANSACTIONS on Electronics
SP - 1699
EP - 1706
AU - Jin-Cheon KIM
AU - Sang-Hoon LEE
AU - Joo-Hyun LEE
AU - Do-Young LEE
AU - Won-Chang JUNG
AU - Hong-June PARK
AU - Im-Soo MOK
AU - Hyung-Gyun KIM
AU - Ga-Woo PARK
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 1999
AB - A 32-bit motor-drive-specific microcontroller chip was newly designed, implemented using a 0.8 µm double-metal CMOS process, and its feasibility was successfully tested by applying the fabricated microcontroller chip to a real AC induction motor drive system. The microcontroller chip includes a single-precision floating-point unit, peripheral devices for motor drive, and a memory controller as well as the SPARC V7 CPU. The pipeline scheme and the two-step multiplication method were used in the multiplier of floating-point unit for the best area and speed trade-off, using the standard cell library available for the design. The chip size is 12.7 12.8 mm², the number of transistors is around 562,000, and the power consumption is 1.69 W at the supply voltage of 5 V and the clock frequency of 30 MHz. Both a standard cell library and a full-custom layout were used in the implementation.
ER -