This paper describes the effect of lowering the supply voltage and threshold voltages on the energy reduction of an ultralow-voltage multi-threshold CMOS/SIMOX (MTCMOS/SIMOX) circuit. The energy dissipation is evaluated using a graph with equispeed and equienergy lines on a supply voltage and a threshold voltage plane. In order to draw equispeed and equienergy lines for ultralow-voltage circuits, we propose a modified energy-evaluation model taking into account a input-waveform transition-time of the circuits. The validity of the proposed energy-evaluation model is confirmed by the evaluation of a gate-chain TEG and a 16-bit CLA adder fabricated with 0.25-µm MTCMOS/SIMOX technology. Using the modified model, the energy-reduction effect in lowering the supply voltage is evaluated for a single-Vth fully-depleted CMOS/SOI circuit, a dual-Vth CMOS circuit consisting of fully-depleted low- and medium-Vth MOSFETs, and a triple-Vth MTCMOS/SIMOX circuit. The evaluation reveals that lowering the supply voltage of the MTCMOS/SIMOX circuit to 0.5 V is advantageous for the energy reduction at a constant operating speed.
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Takakuni DOUSEKI, Toshishige SHIMAMURA, Koji FUJII, Junzo YAMADA, "Energy-Reduction Effect of Ultralow-Voltage MTCMOS/SIMOX Circuits Using a Graph with Equispeed and Equienergy Lines" in IEICE TRANSACTIONS on Electronics,
vol. E83-C, no. 2, pp. 212-219, February 2000, doi: .
Abstract: This paper describes the effect of lowering the supply voltage and threshold voltages on the energy reduction of an ultralow-voltage multi-threshold CMOS/SIMOX (MTCMOS/SIMOX) circuit. The energy dissipation is evaluated using a graph with equispeed and equienergy lines on a supply voltage and a threshold voltage plane. In order to draw equispeed and equienergy lines for ultralow-voltage circuits, we propose a modified energy-evaluation model taking into account a input-waveform transition-time of the circuits. The validity of the proposed energy-evaluation model is confirmed by the evaluation of a gate-chain TEG and a 16-bit CLA adder fabricated with 0.25-µm MTCMOS/SIMOX technology. Using the modified model, the energy-reduction effect in lowering the supply voltage is evaluated for a single-Vth fully-depleted CMOS/SOI circuit, a dual-Vth CMOS circuit consisting of fully-depleted low- and medium-Vth MOSFETs, and a triple-Vth MTCMOS/SIMOX circuit. The evaluation reveals that lowering the supply voltage of the MTCMOS/SIMOX circuit to 0.5 V is advantageous for the energy reduction at a constant operating speed.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e83-c_2_212/_p
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@ARTICLE{e83-c_2_212,
author={Takakuni DOUSEKI, Toshishige SHIMAMURA, Koji FUJII, Junzo YAMADA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Energy-Reduction Effect of Ultralow-Voltage MTCMOS/SIMOX Circuits Using a Graph with Equispeed and Equienergy Lines},
year={2000},
volume={E83-C},
number={2},
pages={212-219},
abstract={This paper describes the effect of lowering the supply voltage and threshold voltages on the energy reduction of an ultralow-voltage multi-threshold CMOS/SIMOX (MTCMOS/SIMOX) circuit. The energy dissipation is evaluated using a graph with equispeed and equienergy lines on a supply voltage and a threshold voltage plane. In order to draw equispeed and equienergy lines for ultralow-voltage circuits, we propose a modified energy-evaluation model taking into account a input-waveform transition-time of the circuits. The validity of the proposed energy-evaluation model is confirmed by the evaluation of a gate-chain TEG and a 16-bit CLA adder fabricated with 0.25-µm MTCMOS/SIMOX technology. Using the modified model, the energy-reduction effect in lowering the supply voltage is evaluated for a single-Vth fully-depleted CMOS/SOI circuit, a dual-Vth CMOS circuit consisting of fully-depleted low- and medium-Vth MOSFETs, and a triple-Vth MTCMOS/SIMOX circuit. The evaluation reveals that lowering the supply voltage of the MTCMOS/SIMOX circuit to 0.5 V is advantageous for the energy reduction at a constant operating speed.},
keywords={},
doi={},
ISSN={},
month={February},}
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TY - JOUR
TI - Energy-Reduction Effect of Ultralow-Voltage MTCMOS/SIMOX Circuits Using a Graph with Equispeed and Equienergy Lines
T2 - IEICE TRANSACTIONS on Electronics
SP - 212
EP - 219
AU - Takakuni DOUSEKI
AU - Toshishige SHIMAMURA
AU - Koji FUJII
AU - Junzo YAMADA
PY - 2000
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E83-C
IS - 2
JA - IEICE TRANSACTIONS on Electronics
Y1 - February 2000
AB - This paper describes the effect of lowering the supply voltage and threshold voltages on the energy reduction of an ultralow-voltage multi-threshold CMOS/SIMOX (MTCMOS/SIMOX) circuit. The energy dissipation is evaluated using a graph with equispeed and equienergy lines on a supply voltage and a threshold voltage plane. In order to draw equispeed and equienergy lines for ultralow-voltage circuits, we propose a modified energy-evaluation model taking into account a input-waveform transition-time of the circuits. The validity of the proposed energy-evaluation model is confirmed by the evaluation of a gate-chain TEG and a 16-bit CLA adder fabricated with 0.25-µm MTCMOS/SIMOX technology. Using the modified model, the energy-reduction effect in lowering the supply voltage is evaluated for a single-Vth fully-depleted CMOS/SOI circuit, a dual-Vth CMOS circuit consisting of fully-depleted low- and medium-Vth MOSFETs, and a triple-Vth MTCMOS/SIMOX circuit. The evaluation reveals that lowering the supply voltage of the MTCMOS/SIMOX circuit to 0.5 V is advantageous for the energy reduction at a constant operating speed.
ER -