An effective way to realize scaled CMOS with both requirements of high current drive and low supply voltage is to introduce high mobility channel such as strained Si. This paper proposes a new device structure using the strained-Si channel, strained-Si-on-Insulator (strained-SOI) MOSFET, applicable to sub-100 nm Si CMOS technology nodes. The device structure and the advantages of strained-SOI MOSFETs are presented. It is demonstrated that strained-SOI MOSFETs are successfully fabricated by combining SIMOX technology with re-growth of strained Si and that n- and p-MOSFETs have mobility of 1.6 and 1.3 times higher than the universal one, respectively. Furthermore, it is also shown that ultra-thin SiGe-on-Insulator (SGOI) virtual substrates with higher Ge content, necessary to further increase mobility and to realize fully-depleted SOI MOSFETs, can be made by oxidation of SGOI structure with lower Ge content.
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copy
Shin-ichi TAKAGI, Tomohisa MIZUNO, Naoharu SUGIYAMA, Tsutomu TEZUKA, Atsushi KUROBE, "Strained-Si-on-Insulator (Strained-SOI) MOSFETs--Concept, Structures and Device Characteristics" in IEICE TRANSACTIONS on Electronics,
vol. E84-C, no. 8, pp. 1043-1050, August 2001, doi: .
Abstract: An effective way to realize scaled CMOS with both requirements of high current drive and low supply voltage is to introduce high mobility channel such as strained Si. This paper proposes a new device structure using the strained-Si channel, strained-Si-on-Insulator (strained-SOI) MOSFET, applicable to sub-100 nm Si CMOS technology nodes. The device structure and the advantages of strained-SOI MOSFETs are presented. It is demonstrated that strained-SOI MOSFETs are successfully fabricated by combining SIMOX technology with re-growth of strained Si and that n- and p-MOSFETs have mobility of 1.6 and 1.3 times higher than the universal one, respectively. Furthermore, it is also shown that ultra-thin SiGe-on-Insulator (SGOI) virtual substrates with higher Ge content, necessary to further increase mobility and to realize fully-depleted SOI MOSFETs, can be made by oxidation of SGOI structure with lower Ge content.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e84-c_8_1043/_p
Copy
@ARTICLE{e84-c_8_1043,
author={Shin-ichi TAKAGI, Tomohisa MIZUNO, Naoharu SUGIYAMA, Tsutomu TEZUKA, Atsushi KUROBE, },
journal={IEICE TRANSACTIONS on Electronics},
title={Strained-Si-on-Insulator (Strained-SOI) MOSFETs--Concept, Structures and Device Characteristics},
year={2001},
volume={E84-C},
number={8},
pages={1043-1050},
abstract={An effective way to realize scaled CMOS with both requirements of high current drive and low supply voltage is to introduce high mobility channel such as strained Si. This paper proposes a new device structure using the strained-Si channel, strained-Si-on-Insulator (strained-SOI) MOSFET, applicable to sub-100 nm Si CMOS technology nodes. The device structure and the advantages of strained-SOI MOSFETs are presented. It is demonstrated that strained-SOI MOSFETs are successfully fabricated by combining SIMOX technology with re-growth of strained Si and that n- and p-MOSFETs have mobility of 1.6 and 1.3 times higher than the universal one, respectively. Furthermore, it is also shown that ultra-thin SiGe-on-Insulator (SGOI) virtual substrates with higher Ge content, necessary to further increase mobility and to realize fully-depleted SOI MOSFETs, can be made by oxidation of SGOI structure with lower Ge content.},
keywords={},
doi={},
ISSN={},
month={August},}
Copy
TY - JOUR
TI - Strained-Si-on-Insulator (Strained-SOI) MOSFETs--Concept, Structures and Device Characteristics
T2 - IEICE TRANSACTIONS on Electronics
SP - 1043
EP - 1050
AU - Shin-ichi TAKAGI
AU - Tomohisa MIZUNO
AU - Naoharu SUGIYAMA
AU - Tsutomu TEZUKA
AU - Atsushi KUROBE
PY - 2001
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E84-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 2001
AB - An effective way to realize scaled CMOS with both requirements of high current drive and low supply voltage is to introduce high mobility channel such as strained Si. This paper proposes a new device structure using the strained-Si channel, strained-Si-on-Insulator (strained-SOI) MOSFET, applicable to sub-100 nm Si CMOS technology nodes. The device structure and the advantages of strained-SOI MOSFETs are presented. It is demonstrated that strained-SOI MOSFETs are successfully fabricated by combining SIMOX technology with re-growth of strained Si and that n- and p-MOSFETs have mobility of 1.6 and 1.3 times higher than the universal one, respectively. Furthermore, it is also shown that ultra-thin SiGe-on-Insulator (SGOI) virtual substrates with higher Ge content, necessary to further increase mobility and to realize fully-depleted SOI MOSFETs, can be made by oxidation of SGOI structure with lower Ge content.
ER -