Reliability of Low Temperature Poly-Si GOLD (Gate-Overlapped LDD) Structure TFTs

Tetsuo KAWAKITA; Hidehiro NAKAGAWA; Yukiharu URAOKA; Takashi FUYUKI

Reliability of Low Temperature Poly-Si GOLD (Gate-Overlapped LDD) Structure TFTs

Tetsuo KAWAKITA, Hidehiro NAKAGAWA, Yukiharu URAOKA, Takashi FUYUKI

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Low-temperature poly-Si thin film transistor with gate-overlapped LDD (GOLD) structure was fabricated. Reliability was evaluated using electrical stress method comparing conventional LDD and single drain structures. As previous researchers have reported, we have confirmed that the degradation of ON current and the field effect mobility was very small compared to conventional LDD or non-LDD structures. We have analyzed the reliability of the GOLD TFT using two-dimensional device simulator. We have clarified that vertical negative field plays a dominant role for improving the reliability in the GOLD TFT. Impact ionization occurs far from the interface between the oxide and poly-silicon by the vertical negative field. GOLD structure is promising for the realization of system on panel.

Publication: IEICE TRANSACTIONS on Electronics Vol.E85-C No.11 pp.1854-1859

Publication Date: 2002/11/01

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Type of Manuscript: Special Section PAPER (Special Issue on Electronic Displays)

Category: Active Matrix Displays

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Tetsuo KAWAKITA, Hidehiro NAKAGAWA, Yukiharu URAOKA, Takashi FUYUKI, "Reliability of Low Temperature Poly-Si GOLD (Gate-Overlapped LDD) Structure TFTs" in IEICE TRANSACTIONS on Electronics, vol. E85-C, no. 11, pp. 1854-1859, November 2002, doi: .
Abstract: Low-temperature poly-Si thin film transistor with gate-overlapped LDD (GOLD) structure was fabricated. Reliability was evaluated using electrical stress method comparing conventional LDD and single drain structures. As previous researchers have reported, we have confirmed that the degradation of ON current and the field effect mobility was very small compared to conventional LDD or non-LDD structures. We have analyzed the reliability of the GOLD TFT using two-dimensional device simulator. We have clarified that vertical negative field plays a dominant role for improving the reliability in the GOLD TFT. Impact ionization occurs far from the interface between the oxide and poly-silicon by the vertical negative field. GOLD structure is promising for the realization of system on panel.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e85-c_11_1854/_p

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@ARTICLE{e85-c_11_1854,
author={Tetsuo KAWAKITA, Hidehiro NAKAGAWA, Yukiharu URAOKA, Takashi FUYUKI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Reliability of Low Temperature Poly-Si GOLD (Gate-Overlapped LDD) Structure TFTs},
year={2002},
volume={E85-C},
number={11},
pages={1854-1859},
abstract={Low-temperature poly-Si thin film transistor with gate-overlapped LDD (GOLD) structure was fabricated. Reliability was evaluated using electrical stress method comparing conventional LDD and single drain structures. As previous researchers have reported, we have confirmed that the degradation of ON current and the field effect mobility was very small compared to conventional LDD or non-LDD structures. We have analyzed the reliability of the GOLD TFT using two-dimensional device simulator. We have clarified that vertical negative field plays a dominant role for improving the reliability in the GOLD TFT. Impact ionization occurs far from the interface between the oxide and poly-silicon by the vertical negative field. GOLD structure is promising for the realization of system on panel.},
keywords={},
doi={},
ISSN={},
month={November},}

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TY - JOUR
TI - Reliability of Low Temperature Poly-Si GOLD (Gate-Overlapped LDD) Structure TFTs
T2 - IEICE TRANSACTIONS on Electronics
SP - 1854
EP - 1859
AU - Tetsuo KAWAKITA
AU - Hidehiro NAKAGAWA
AU - Yukiharu URAOKA
AU - Takashi FUYUKI
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E85-C
IS - 11
JA - IEICE TRANSACTIONS on Electronics
Y1 - November 2002
AB - Low-temperature poly-Si thin film transistor with gate-overlapped LDD (GOLD) structure was fabricated. Reliability was evaluated using electrical stress method comparing conventional LDD and single drain structures. As previous researchers have reported, we have confirmed that the degradation of ON current and the field effect mobility was very small compared to conventional LDD or non-LDD structures. We have analyzed the reliability of the GOLD TFT using two-dimensional device simulator. We have clarified that vertical negative field plays a dominant role for improving the reliability in the GOLD TFT. Impact ionization occurs far from the interface between the oxide and poly-silicon by the vertical negative field. GOLD structure is promising for the realization of system on panel.
ER -