This letter proposes an output driver which reduces simultaneous switching noise without degradation of rise/fall time. At the start of transition period, the driver optimally uses both VDD and VSS current by switching of on-chip bypass capacitors. The proposed driver achieves 27-percent reduction in peak current with faster transition time.
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Jae-Yoon SIM, Kee-Won KWON, "A Peak-Current-Reduced Full-Swing CMOS Output Driver" in IEICE TRANSACTIONS on Electronics,
vol. E87-C, no. 6, pp. 1037-1039, June 2004, doi: .
Abstract: This letter proposes an output driver which reduces simultaneous switching noise without degradation of rise/fall time. At the start of transition period, the driver optimally uses both VDD and VSS current by switching of on-chip bypass capacitors. The proposed driver achieves 27-percent reduction in peak current with faster transition time.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e87-c_6_1037/_p
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@ARTICLE{e87-c_6_1037,
author={Jae-Yoon SIM, Kee-Won KWON, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Peak-Current-Reduced Full-Swing CMOS Output Driver},
year={2004},
volume={E87-C},
number={6},
pages={1037-1039},
abstract={This letter proposes an output driver which reduces simultaneous switching noise without degradation of rise/fall time. At the start of transition period, the driver optimally uses both VDD and VSS current by switching of on-chip bypass capacitors. The proposed driver achieves 27-percent reduction in peak current with faster transition time.},
keywords={},
doi={},
ISSN={},
month={June},}
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TY - JOUR
TI - A Peak-Current-Reduced Full-Swing CMOS Output Driver
T2 - IEICE TRANSACTIONS on Electronics
SP - 1037
EP - 1039
AU - Jae-Yoon SIM
AU - Kee-Won KWON
PY - 2004
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E87-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2004
AB - This letter proposes an output driver which reduces simultaneous switching noise without degradation of rise/fall time. At the start of transition period, the driver optimally uses both VDD and VSS current by switching of on-chip bypass capacitors. The proposed driver achieves 27-percent reduction in peak current with faster transition time.
ER -