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IEICE TRANSACTIONS on Electronics

A 28-GHz CMOS Vector-Summing Phase Shifter Featuring I/Q Imbalance Calibration Supporting 11.2Gb/s in 256QAM for 5G New Radio

Jian PANG, Ryo KUBOZOE, Zheng LI, Masaru KAWABUCHI, Atsushi SHIRANE, Kenichi OKADA

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Summary :

Regarding the enlarged array size for the 5G new radio (NR) millimeter-wave phased-array transceivers, an improved phase tuning resolution will be required to support the accurate beam control. This paper introduces a CMOS implementation of an active vector-summing phase shifter. The proposed phase shifter realizes a 6-bit phase shifting with an active area of 0.32mm2. To minimize the gain variation during the phase tuning, a gain error compensation technique is proposed. After the compensation, the measured gain variation within the 5G NR band n257 is less than 0.9dB. The corresponding RMS gain error is less than 0.2dB. The measured RMS phase error from 26.5GHz to 29.5GHz is less than 1.2°. Gain-invariant, high-resolution phase tuning is realized by this work. Considering the error vector magnitude (EVM) performance, the proposed phase shifter supports a maximum data rate of 11.2Gb/s in 256QAM with a power consumption of 25.2mW.

Publication
IEICE TRANSACTIONS on Electronics Vol.E103-C No.2 pp.39-47
Publication Date
2020/02/01
Publicized
2019/08/19
Online ISSN
1745-1353
DOI
10.1587/transele.2019ECP5017
Type of Manuscript
PAPER
Category
Electronic Circuits

Authors

Jian PANG
  Tokyo Institute of Technology
Ryo KUBOZOE
  Tokyo Institute of Technology
Zheng LI
  Tokyo Institute of Technology
Masaru KAWABUCHI
  Tokyo Institute of Technology
Atsushi SHIRANE
  Tokyo Institute of Technology
Kenichi OKADA
  Tokyo Institute of Technology

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