A Neural Recording Amplifier with Low-Frequency Noise Suppression
Summary :
To detect neural spike signals, low-power neural signal recording frontend circuits must amplify neural signals with below 100 µV amplitude and a few hundred Hz frequency while suppressing a large DC offset voltage, 1/f noise of MOSFETs, and induced noise of AC power supply. To overcome the problem of unwanted noise at such a low signal level, a low-noise neural signal detection amplifier with low-frequency noise suppression scheme was developed utilizing a new autozeroing technique. A test chip was designed and fabricated with a mixed signal 0.18-µm CMOS technology. The voltage gain of 39 dB at the bandwidth of the neural signal and the gain reduction of 20 dB at AC supply noise of 60 Hz were obtained. The input equivalent noise and power dissipation were 90 nV/root-Hz and 90 µW at a supply voltage of 1.5 V, respectively.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E93-C No.6 pp.849-854
- Publication Date
- 2010/06/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E93.C.849
- Type of Manuscript
- Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
- Category
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Takeshi YOSHIDA, Yoshihiro MASUI, Ryoji EKI, Atsushi IWATA, Masayuki YOSHIDA, Kazumasa UEMATSU, "A Neural Recording Amplifier with Low-Frequency Noise Suppression" in IEICE TRANSACTIONS on Electronics,
vol. E93-C, no. 6, pp. 849-854, June 2010, doi: 10.1587/transele.E93.C.849.
Abstract: To detect neural spike signals, low-power neural signal recording frontend circuits must amplify neural signals with below 100 µV amplitude and a few hundred Hz frequency while suppressing a large DC offset voltage, 1/f noise of MOSFETs, and induced noise of AC power supply. To overcome the problem of unwanted noise at such a low signal level, a low-noise neural signal detection amplifier with low-frequency noise suppression scheme was developed utilizing a new autozeroing technique. A test chip was designed and fabricated with a mixed signal 0.18-µm CMOS technology. The voltage gain of 39 dB at the bandwidth of the neural signal and the gain reduction of 20 dB at AC supply noise of 60 Hz were obtained. The input equivalent noise and power dissipation were 90 nV/root-Hz and 90 µW at a supply voltage of 1.5 V, respectively.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.849/_p
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@ARTICLE{e93-c_6_849,
author={Takeshi YOSHIDA, Yoshihiro MASUI, Ryoji EKI, Atsushi IWATA, Masayuki YOSHIDA, Kazumasa UEMATSU, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Neural Recording Amplifier with Low-Frequency Noise Suppression},
year={2010},
volume={E93-C},
number={6},
pages={849-854},
abstract={To detect neural spike signals, low-power neural signal recording frontend circuits must amplify neural signals with below 100 µV amplitude and a few hundred Hz frequency while suppressing a large DC offset voltage, 1/f noise of MOSFETs, and induced noise of AC power supply. To overcome the problem of unwanted noise at such a low signal level, a low-noise neural signal detection amplifier with low-frequency noise suppression scheme was developed utilizing a new autozeroing technique. A test chip was designed and fabricated with a mixed signal 0.18-µm CMOS technology. The voltage gain of 39 dB at the bandwidth of the neural signal and the gain reduction of 20 dB at AC supply noise of 60 Hz were obtained. The input equivalent noise and power dissipation were 90 nV/root-Hz and 90 µW at a supply voltage of 1.5 V, respectively.},
keywords={},
doi={10.1587/transele.E93.C.849},
ISSN={1745-1353},
month={June},}
Copy
TY - JOUR
TI - A Neural Recording Amplifier with Low-Frequency Noise Suppression
T2 - IEICE TRANSACTIONS on Electronics
SP - 849
EP - 854
AU - Takeshi YOSHIDA
AU - Yoshihiro MASUI
AU - Ryoji EKI
AU - Atsushi IWATA
AU - Masayuki YOSHIDA
AU - Kazumasa UEMATSU
PY - 2010
DO - 10.1587/transele.E93.C.849
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2010
AB - To detect neural spike signals, low-power neural signal recording frontend circuits must amplify neural signals with below 100 µV amplitude and a few hundred Hz frequency while suppressing a large DC offset voltage, 1/f noise of MOSFETs, and induced noise of AC power supply. To overcome the problem of unwanted noise at such a low signal level, a low-noise neural signal detection amplifier with low-frequency noise suppression scheme was developed utilizing a new autozeroing technique. A test chip was designed and fabricated with a mixed signal 0.18-µm CMOS technology. The voltage gain of 39 dB at the bandwidth of the neural signal and the gain reduction of 20 dB at AC supply noise of 60 Hz were obtained. The input equivalent noise and power dissipation were 90 nV/root-Hz and 90 µW at a supply voltage of 1.5 V, respectively.
ER -
English
