IEICE TRANSACTIONS on Electronics
A 60-GHz Injection-Locked Frequency Divider Using Multi-Order LC Oscillator Topology for Wide Locking Range
Summary :
A 60-GHz injection-locked frequency divider (ILFD) is presented. A multi-order LC oscillator topology is proposed to enhance the locking range of the divider. A design guideline is described based on a theoretical analysis of the locking range enhancement. A test chip is fabricated in 65 nm CMOS. Measured locking range with 0 dBm input power is 48.5–62.9 GHz (25.9%), which is 63.6% wider compared to the previously reported ILFD. Power consumption excluding buffers and biasing circuits is 1.65 mW from 1.2 V supply. The core ILFD area is 0.0157 mm2 even with an extra pair of inductors.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E94-C No.6 pp.1049-1052
- Publication Date
- 2011/06/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E94.C.1049
- Type of Manuscript
- BRIEF PAPER
- Category
Authors
Keita TAKATSU
Hirotaka TAMURA
Takuji YAMAMOTO
Yoshiyasu DOI
Koichi KANDA
Takayuki SHIBASAKI
Tadahiro KURODA
Keyword
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Keita TAKATSU, Hirotaka TAMURA, Takuji YAMAMOTO, Yoshiyasu DOI, Koichi KANDA, Takayuki SHIBASAKI, Tadahiro KURODA, "A 60-GHz Injection-Locked Frequency Divider Using Multi-Order LC Oscillator Topology for Wide Locking Range" in IEICE TRANSACTIONS on Electronics,
vol. E94-C, no. 6, pp. 1049-1052, June 2011, doi: 10.1587/transele.E94.C.1049.
Abstract: A 60-GHz injection-locked frequency divider (ILFD) is presented. A multi-order LC oscillator topology is proposed to enhance the locking range of the divider. A design guideline is described based on a theoretical analysis of the locking range enhancement. A test chip is fabricated in 65 nm CMOS. Measured locking range with 0 dBm input power is 48.5–62.9 GHz (25.9%), which is 63.6% wider compared to the previously reported ILFD. Power consumption excluding buffers and biasing circuits is 1.65 mW from 1.2 V supply. The core ILFD area is 0.0157 mm2 even with an extra pair of inductors.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E94.C.1049/_p
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@ARTICLE{e94-c_6_1049,
author={Keita TAKATSU, Hirotaka TAMURA, Takuji YAMAMOTO, Yoshiyasu DOI, Koichi KANDA, Takayuki SHIBASAKI, Tadahiro KURODA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 60-GHz Injection-Locked Frequency Divider Using Multi-Order LC Oscillator Topology for Wide Locking Range},
year={2011},
volume={E94-C},
number={6},
pages={1049-1052},
abstract={A 60-GHz injection-locked frequency divider (ILFD) is presented. A multi-order LC oscillator topology is proposed to enhance the locking range of the divider. A design guideline is described based on a theoretical analysis of the locking range enhancement. A test chip is fabricated in 65 nm CMOS. Measured locking range with 0 dBm input power is 48.5–62.9 GHz (25.9%), which is 63.6% wider compared to the previously reported ILFD. Power consumption excluding buffers and biasing circuits is 1.65 mW from 1.2 V supply. The core ILFD area is 0.0157 mm2 even with an extra pair of inductors.},
keywords={},
doi={10.1587/transele.E94.C.1049},
ISSN={1745-1353},
month={June},}
Copy
TY - JOUR
TI - A 60-GHz Injection-Locked Frequency Divider Using Multi-Order LC Oscillator Topology for Wide Locking Range
T2 - IEICE TRANSACTIONS on Electronics
SP - 1049
EP - 1052
AU - Keita TAKATSU
AU - Hirotaka TAMURA
AU - Takuji YAMAMOTO
AU - Yoshiyasu DOI
AU - Koichi KANDA
AU - Takayuki SHIBASAKI
AU - Tadahiro KURODA
PY - 2011
DO - 10.1587/transele.E94.C.1049
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E94-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2011
AB - A 60-GHz injection-locked frequency divider (ILFD) is presented. A multi-order LC oscillator topology is proposed to enhance the locking range of the divider. A design guideline is described based on a theoretical analysis of the locking range enhancement. A test chip is fabricated in 65 nm CMOS. Measured locking range with 0 dBm input power is 48.5–62.9 GHz (25.9%), which is 63.6% wider compared to the previously reported ILFD. Power consumption excluding buffers and biasing circuits is 1.65 mW from 1.2 V supply. The core ILFD area is 0.0157 mm2 even with an extra pair of inductors.
ER -
English
