0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65 nm CMOS

Yasuyuki OKUMA; Koichi ISHIDA; Yoshikatsu RYU; Xin ZHANG; Po-Hung CHEN; Kazunori WATANABE; Makoto TAKAMIYA; Takayasu SAKURAI

doi:10.1587/transele.E94.C.938

0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65 nm CMOS

Yasuyuki OKUMA, Koichi ISHIDA, Yoshikatsu RYU, Xin ZHANG, Po-Hung CHEN, Kazunori WATANABE, Makoto TAKAMIYA, Takayasu SAKURAI

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In this paper, Digital Low Dropout Regulator (LDO) is proposed to provide the low noise and tunable power supply voltage to the 0.5-V near-threshold logic circuits. Because the conventional LDO feedback-controlled by the operational amplifier fail to operate at 0.5 V, the digital LDO eliminates all analog circuits and is controlled by digital circuits, which enables the 0.5-V operation. The developed digital LDO in 65 nm CMOS achieved the 0.5-V input voltage and 0.45-V output voltage with 98.7% current efficiency and 2.7-µA quiescent current at 200-µA load current. Both the input voltage and the quiescent current are the lowest values in the published LDO's, which indicates the good energy efficiency of the digital LDO at 0.5-V operation.

Publication: IEICE TRANSACTIONS on Electronics Vol.E94-C No.6 pp.938-944

Publication Date: 2011/06/01

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Online ISSN: 1745-1353

DOI: 10.1587/transele.E94.C.938

Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)

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Yasuyuki OKUMA, Koichi ISHIDA, Yoshikatsu RYU, Xin ZHANG, Po-Hung CHEN, Kazunori WATANABE, Makoto TAKAMIYA, Takayasu SAKURAI, "0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65 nm CMOS" in IEICE TRANSACTIONS on Electronics, vol. E94-C, no. 6, pp. 938-944, June 2011, doi: 10.1587/transele.E94.C.938.
Abstract: In this paper, Digital Low Dropout Regulator (LDO) is proposed to provide the low noise and tunable power supply voltage to the 0.5-V near-threshold logic circuits. Because the conventional LDO feedback-controlled by the operational amplifier fail to operate at 0.5 V, the digital LDO eliminates all analog circuits and is controlled by digital circuits, which enables the 0.5-V operation. The developed digital LDO in 65 nm CMOS achieved the 0.5-V input voltage and 0.45-V output voltage with 98.7% current efficiency and 2.7-µA quiescent current at 200-µA load current. Both the input voltage and the quiescent current are the lowest values in the published LDO's, which indicates the good energy efficiency of the digital LDO at 0.5-V operation.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E94.C.938/_p

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@ARTICLE{e94-c_6_938,
author={Yasuyuki OKUMA, Koichi ISHIDA, Yoshikatsu RYU, Xin ZHANG, Po-Hung CHEN, Kazunori WATANABE, Makoto TAKAMIYA, Takayasu SAKURAI, },
journal={IEICE TRANSACTIONS on Electronics},
title={0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65 nm CMOS},
year={2011},
volume={E94-C},
number={6},
pages={938-944},
abstract={In this paper, Digital Low Dropout Regulator (LDO) is proposed to provide the low noise and tunable power supply voltage to the 0.5-V near-threshold logic circuits. Because the conventional LDO feedback-controlled by the operational amplifier fail to operate at 0.5 V, the digital LDO eliminates all analog circuits and is controlled by digital circuits, which enables the 0.5-V operation. The developed digital LDO in 65 nm CMOS achieved the 0.5-V input voltage and 0.45-V output voltage with 98.7% current efficiency and 2.7-µA quiescent current at 200-µA load current. Both the input voltage and the quiescent current are the lowest values in the published LDO's, which indicates the good energy efficiency of the digital LDO at 0.5-V operation.},
keywords={},
doi={10.1587/transele.E94.C.938},
ISSN={1745-1353},
month={June},}

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TY - JOUR
TI - 0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65 nm CMOS
T2 - IEICE TRANSACTIONS on Electronics
SP - 938
EP - 944
AU - Yasuyuki OKUMA
AU - Koichi ISHIDA
AU - Yoshikatsu RYU
AU - Xin ZHANG
AU - Po-Hung CHEN
AU - Kazunori WATANABE
AU - Makoto TAKAMIYA
AU - Takayasu SAKURAI
PY - 2011
DO - 10.1587/transele.E94.C.938
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E94-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2011
AB - In this paper, Digital Low Dropout Regulator (LDO) is proposed to provide the low noise and tunable power supply voltage to the 0.5-V near-threshold logic circuits. Because the conventional LDO feedback-controlled by the operational amplifier fail to operate at 0.5 V, the digital LDO eliminates all analog circuits and is controlled by digital circuits, which enables the 0.5-V operation. The developed digital LDO in 65 nm CMOS achieved the 0.5-V input voltage and 0.45-V output voltage with 98.7% current efficiency and 2.7-µA quiescent current at 200-µA load current. Both the input voltage and the quiescent current are the lowest values in the published LDO's, which indicates the good energy efficiency of the digital LDO at 0.5-V operation.
ER -