This paper describes a high-speed, robust, scalable, and low-cost feed-forward time amplifier that uses phase detectors and variable delay lines. The amplifier works by detecting the time difference between two rising input edges with a phase detector and adjusting the delay of the variable delay line accordingly. A test chip was designed and fabricated in 65 nm CMOS. The measured resulting performance indicates that it is possible to amplify time difference while maintaining high-speed operation.
Kiichi NIITSU
Nagoya University
Naohiro HARIGAI
Gunma University
Takahiro J. YAMAGUCHI
Gunma University
Haruo KOBAYASHI
Gunma University
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Kiichi NIITSU, Naohiro HARIGAI, Takahiro J. YAMAGUCHI, Haruo KOBAYASHI, "A Feed-Forward Time Amplifier Using a Phase Detector and Variable Delay Lines" in IEICE TRANSACTIONS on Electronics,
vol. E96-C, no. 6, pp. 920-922, June 2013, doi: 10.1587/transele.E96.C.920.
Abstract: This paper describes a high-speed, robust, scalable, and low-cost feed-forward time amplifier that uses phase detectors and variable delay lines. The amplifier works by detecting the time difference between two rising input edges with a phase detector and adjusting the delay of the variable delay line accordingly. A test chip was designed and fabricated in 65 nm CMOS. The measured resulting performance indicates that it is possible to amplify time difference while maintaining high-speed operation.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E96.C.920/_p
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@ARTICLE{e96-c_6_920,
author={Kiichi NIITSU, Naohiro HARIGAI, Takahiro J. YAMAGUCHI, Haruo KOBAYASHI, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Feed-Forward Time Amplifier Using a Phase Detector and Variable Delay Lines},
year={2013},
volume={E96-C},
number={6},
pages={920-922},
abstract={This paper describes a high-speed, robust, scalable, and low-cost feed-forward time amplifier that uses phase detectors and variable delay lines. The amplifier works by detecting the time difference between two rising input edges with a phase detector and adjusting the delay of the variable delay line accordingly. A test chip was designed and fabricated in 65 nm CMOS. The measured resulting performance indicates that it is possible to amplify time difference while maintaining high-speed operation.},
keywords={},
doi={10.1587/transele.E96.C.920},
ISSN={1745-1353},
month={June},}
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TY - JOUR
TI - A Feed-Forward Time Amplifier Using a Phase Detector and Variable Delay Lines
T2 - IEICE TRANSACTIONS on Electronics
SP - 920
EP - 922
AU - Kiichi NIITSU
AU - Naohiro HARIGAI
AU - Takahiro J. YAMAGUCHI
AU - Haruo KOBAYASHI
PY - 2013
DO - 10.1587/transele.E96.C.920
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E96-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2013
AB - This paper describes a high-speed, robust, scalable, and low-cost feed-forward time amplifier that uses phase detectors and variable delay lines. The amplifier works by detecting the time difference between two rising input edges with a phase detector and adjusting the delay of the variable delay line accordingly. A test chip was designed and fabricated in 65 nm CMOS. The measured resulting performance indicates that it is possible to amplify time difference while maintaining high-speed operation.
ER -