IEICE TRANSACTIONS on Electronics
High-Speed Operation of 0.25-mV RSFQ Arithmetic Logic Unit Based on 10-kA/cm2 Nb Process Technology
Summary :
We report the successful operation of a low-power arithmetic logic unit (ALU) based on a low-voltage rapid single-flux-quantum (LV-RSFQ) logic circuit, whereby a dc bias current is fed to circuits from lowered constant-voltage sources through small resistors. Both the static and dynamic energy consumptions are reduced because of the reduction in the amplitudes of voltage pulses across the Josephson junctions, with a trade-off of slightly slower switching speeds. The designed bias voltage was set to 0.25mV, which is one-tenth that of our standard RSFQ circuit design. We investigated several issues related to such low-voltage operation, including margins and timing design. To achieve successful operation, we tuned the circuit parameters in the logic gate design and carefully controlled the timing by considering the interference of pulse signals. We show test results for the low-voltage ALU in on-chip high-speed testing. The circuit was fabricated using the AIST Nb/AlOx/Nb Advanced Process with a critical current density of 10kA/cm2. We verified that arithmetic and logical operations were correctly implemented and obtained dc bias margins of 18% at a target clock frequency of 20GHz and achieved a maximum clock frequency of 28GHz with a power consumption of 28µW. These experimental results indicate energy efficiency of 3.6 times that of the standard RSFQ circuit design.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E97-C No.3 pp.166-172
- Publication Date
- 2014/03/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E97.C.166
- Type of Manuscript
- Special Section PAPER (Special Section on Leading-Edge Technology of Superconductor Large-Scale Integrated Circuits)
- Category
Authors
Masamitsu TANAKA
Nagoya University
Atsushi KITAYAMA
Nagoya University
Masakazu OKADA
Nagoya University
Tomohito KOUKETSU
Nagoya University
Takumi TAKINAMI
Nagoya University
Masato ITO
Nagoya University
Akira FUJIMAKI
Nagoya University
Keyword
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Masamitsu TANAKA, Atsushi KITAYAMA, Masakazu OKADA, Tomohito KOUKETSU, Takumi TAKINAMI, Masato ITO, Akira FUJIMAKI, "High-Speed Operation of 0.25-mV RSFQ Arithmetic Logic Unit Based on 10-kA/cm2 Nb Process Technology" in IEICE TRANSACTIONS on Electronics,
vol. E97-C, no. 3, pp. 166-172, March 2014, doi: 10.1587/transele.E97.C.166.
Abstract: We report the successful operation of a low-power arithmetic logic unit (ALU) based on a low-voltage rapid single-flux-quantum (LV-RSFQ) logic circuit, whereby a dc bias current is fed to circuits from lowered constant-voltage sources through small resistors. Both the static and dynamic energy consumptions are reduced because of the reduction in the amplitudes of voltage pulses across the Josephson junctions, with a trade-off of slightly slower switching speeds. The designed bias voltage was set to 0.25mV, which is one-tenth that of our standard RSFQ circuit design. We investigated several issues related to such low-voltage operation, including margins and timing design. To achieve successful operation, we tuned the circuit parameters in the logic gate design and carefully controlled the timing by considering the interference of pulse signals. We show test results for the low-voltage ALU in on-chip high-speed testing. The circuit was fabricated using the AIST Nb/AlOx/Nb Advanced Process with a critical current density of 10kA/cm2. We verified that arithmetic and logical operations were correctly implemented and obtained dc bias margins of 18% at a target clock frequency of 20GHz and achieved a maximum clock frequency of 28GHz with a power consumption of 28µW. These experimental results indicate energy efficiency of 3.6 times that of the standard RSFQ circuit design.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E97.C.166/_p
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@ARTICLE{e97-c_3_166,
author={Masamitsu TANAKA, Atsushi KITAYAMA, Masakazu OKADA, Tomohito KOUKETSU, Takumi TAKINAMI, Masato ITO, Akira FUJIMAKI, },
journal={IEICE TRANSACTIONS on Electronics},
title={High-Speed Operation of 0.25-mV RSFQ Arithmetic Logic Unit Based on 10-kA/cm2 Nb Process Technology},
year={2014},
volume={E97-C},
number={3},
pages={166-172},
abstract={We report the successful operation of a low-power arithmetic logic unit (ALU) based on a low-voltage rapid single-flux-quantum (LV-RSFQ) logic circuit, whereby a dc bias current is fed to circuits from lowered constant-voltage sources through small resistors. Both the static and dynamic energy consumptions are reduced because of the reduction in the amplitudes of voltage pulses across the Josephson junctions, with a trade-off of slightly slower switching speeds. The designed bias voltage was set to 0.25mV, which is one-tenth that of our standard RSFQ circuit design. We investigated several issues related to such low-voltage operation, including margins and timing design. To achieve successful operation, we tuned the circuit parameters in the logic gate design and carefully controlled the timing by considering the interference of pulse signals. We show test results for the low-voltage ALU in on-chip high-speed testing. The circuit was fabricated using the AIST Nb/AlOx/Nb Advanced Process with a critical current density of 10kA/cm2. We verified that arithmetic and logical operations were correctly implemented and obtained dc bias margins of 18% at a target clock frequency of 20GHz and achieved a maximum clock frequency of 28GHz with a power consumption of 28µW. These experimental results indicate energy efficiency of 3.6 times that of the standard RSFQ circuit design.},
keywords={},
doi={10.1587/transele.E97.C.166},
ISSN={1745-1353},
month={March},}
Copy
TY - JOUR
TI - High-Speed Operation of 0.25-mV RSFQ Arithmetic Logic Unit Based on 10-kA/cm2 Nb Process Technology
T2 - IEICE TRANSACTIONS on Electronics
SP - 166
EP - 172
AU - Masamitsu TANAKA
AU - Atsushi KITAYAMA
AU - Masakazu OKADA
AU - Tomohito KOUKETSU
AU - Takumi TAKINAMI
AU - Masato ITO
AU - Akira FUJIMAKI
PY - 2014
DO - 10.1587/transele.E97.C.166
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E97-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2014
AB - We report the successful operation of a low-power arithmetic logic unit (ALU) based on a low-voltage rapid single-flux-quantum (LV-RSFQ) logic circuit, whereby a dc bias current is fed to circuits from lowered constant-voltage sources through small resistors. Both the static and dynamic energy consumptions are reduced because of the reduction in the amplitudes of voltage pulses across the Josephson junctions, with a trade-off of slightly slower switching speeds. The designed bias voltage was set to 0.25mV, which is one-tenth that of our standard RSFQ circuit design. We investigated several issues related to such low-voltage operation, including margins and timing design. To achieve successful operation, we tuned the circuit parameters in the logic gate design and carefully controlled the timing by considering the interference of pulse signals. We show test results for the low-voltage ALU in on-chip high-speed testing. The circuit was fabricated using the AIST Nb/AlOx/Nb Advanced Process with a critical current density of 10kA/cm2. We verified that arithmetic and logical operations were correctly implemented and obtained dc bias margins of 18% at a target clock frequency of 20GHz and achieved a maximum clock frequency of 28GHz with a power consumption of 28µW. These experimental results indicate energy efficiency of 3.6 times that of the standard RSFQ circuit design.
ER -
English
