IEICE TRANSACTIONS on Fundamentals
An Efficient Simulator for Multiport Interconnects with Model Order Reduction Technique
Summary :
With the progress of integration of circuits and PCBs (Printed Circuit Boards), novel techniques have been required for verification of signal integrity. Noise analysis of the power/ground planes is one of the most important issues. This paper describes a high-speed simulator for PCBs which contain the interconnects with nonlinear terminations. This simulator is based on the environmental tool ASSIST (Assistant System for Simulation Study) constructed for development of the circuit simulators, and is combined with PRIMA (Passive Reduced-Order Interconnect Macromodeling Algorithm). In this simulator, an efficient implementation of PRIMA is considered with using a voltage-controlled current source (VCCS) model. Finally, this simulator is applied to the analysis of power/ground planes of the simple PCBs, and the validity is verified.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E85-A No.6 pp.1214-1219
- Publication Date
- 2002/06/01
- Publicized
- Online ISSN
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- Type of Manuscript
- Special Section PAPER (Special Section on Papers Selected from 2001 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2001))
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Hidemasa KUBOTA, Atsushi KAMO, Takayuki WATANABE, Hideki ASAI, "An Efficient Simulator for Multiport Interconnects with Model Order Reduction Technique" in IEICE TRANSACTIONS on Fundamentals,
vol. E85-A, no. 6, pp. 1214-1219, June 2002, doi: .
Abstract: With the progress of integration of circuits and PCBs (Printed Circuit Boards), novel techniques have been required for verification of signal integrity. Noise analysis of the power/ground planes is one of the most important issues. This paper describes a high-speed simulator for PCBs which contain the interconnects with nonlinear terminations. This simulator is based on the environmental tool ASSIST (Assistant System for Simulation Study) constructed for development of the circuit simulators, and is combined with PRIMA (Passive Reduced-Order Interconnect Macromodeling Algorithm). In this simulator, an efficient implementation of PRIMA is considered with using a voltage-controlled current source (VCCS) model. Finally, this simulator is applied to the analysis of power/ground planes of the simple PCBs, and the validity is verified.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e85-a_6_1214/_p
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@ARTICLE{e85-a_6_1214,
author={Hidemasa KUBOTA, Atsushi KAMO, Takayuki WATANABE, Hideki ASAI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={An Efficient Simulator for Multiport Interconnects with Model Order Reduction Technique},
year={2002},
volume={E85-A},
number={6},
pages={1214-1219},
abstract={With the progress of integration of circuits and PCBs (Printed Circuit Boards), novel techniques have been required for verification of signal integrity. Noise analysis of the power/ground planes is one of the most important issues. This paper describes a high-speed simulator for PCBs which contain the interconnects with nonlinear terminations. This simulator is based on the environmental tool ASSIST (Assistant System for Simulation Study) constructed for development of the circuit simulators, and is combined with PRIMA (Passive Reduced-Order Interconnect Macromodeling Algorithm). In this simulator, an efficient implementation of PRIMA is considered with using a voltage-controlled current source (VCCS) model. Finally, this simulator is applied to the analysis of power/ground planes of the simple PCBs, and the validity is verified.},
keywords={},
doi={},
ISSN={},
month={June},}
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TY - JOUR
TI - An Efficient Simulator for Multiport Interconnects with Model Order Reduction Technique
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1214
EP - 1219
AU - Hidemasa KUBOTA
AU - Atsushi KAMO
AU - Takayuki WATANABE
AU - Hideki ASAI
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E85-A
IS - 6
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - June 2002
AB - With the progress of integration of circuits and PCBs (Printed Circuit Boards), novel techniques have been required for verification of signal integrity. Noise analysis of the power/ground planes is one of the most important issues. This paper describes a high-speed simulator for PCBs which contain the interconnects with nonlinear terminations. This simulator is based on the environmental tool ASSIST (Assistant System for Simulation Study) constructed for development of the circuit simulators, and is combined with PRIMA (Passive Reduced-Order Interconnect Macromodeling Algorithm). In this simulator, an efficient implementation of PRIMA is considered with using a voltage-controlled current source (VCCS) model. Finally, this simulator is applied to the analysis of power/ground planes of the simple PCBs, and the validity is verified.
ER -
English
