A high barrier Schottky gate on InGaP/InGaAs doped-channel FETs (DCFETs) provides a high current density, high gate-to-drain breakdown voltage and a better linear operation over a wide gate bias range. However, these doped-channel devices are limited by a large parasitic resistance associated with a 20 nm thick undoped InGaP layer beneath the gate metal. In this study, we inserted a Si δ-doped layer inside this high bandgap undoped InGaP layer to reduce parasitic resistances and to enhance device DC and RF power performance. These modified DCFETs (M-DCFETs) demonstrated an output power density of 204 mW/mm, a power-added efficiency of 45%, and a linear power gain of 18.3 dB for an 1 mm gate-width device under a 2.4 GHz operation. These characteristics suggest that doped-channel FETs with a Si δ-doped layer provide a good potential for high power microwave device applications.

A new cell structure Power MOSFET, which exhibits a lower on-state resistance and lower gate charge than the conventional layout geometry, is proposed in this research. Vertical Power MOSFETs are generally designed by either squared (closed) cell or stripe (linear) cell geometry; each has its own advantages and drawbacks. Typically, closed cell design has lower on resistance but higher gate charge characteristics than the linear one. In this study, we propose, fabricate, and analyze a "wing cell" structure Power MOSFET, which can have lower on resistance and lower gate charge performances than the closed cell structure. In addition, the wing cell design can avoid the "closed concept" patents.

Devices DC, RF, and microwave power performances between Al0.3Ga0.7As/In0.15Ga0.85As double doped-channel FET (D-DCFETs), conventional doped-channel FETs (DCFETs) and HEMTs are compared with each other. Device linearity and power performance have been improved by a double doped-channel design. The D-DCFETs provides a higher current density, higher gate breakdown voltage, and improves gate operation bias range as well as frequency performance. The linear power gain and output power for D-DCFETs is 19 dB and 305 mW/mm with a power-added efficiency of 52% at Vds = 2.5 V under a 1.9 GHz operation. These advantages suggest that double doped-channel design is more suitable for a high linearity and high microwave power device applications.

Vertical Power MOSFETs are widely designed by deep well structures for breakdown requirement. In this study, we proposed, simulated, and analyzed a "shallow dual well" structure Power MOSFET, which utilize an n-well to cover the conventional p-well. The cell pitch can be reduced and results in an increased cell density. The reduced cell pitch and increased cell density improves the gate charge and on resistance performances about 66.5% and 15.8% without sacrificing the device breakdown owing to a shallow junction design. In addition, with the dual well structure design, the breakdown point will occur at the center of the well. Therefore, the capability of avalanche energy can be improved about 1.9 times than the tradition well structure.