B(P)SCCO films were prepared on MgO substrate by a double cathode dc sputtering with a mosaic BiχSrCaCuyOz and (Bi0.7Pb0.3)χ SrCaCuyOz target. The films were deposited at 200 and 550, and then annealed. We have obtained the B(P)SCCO films with Tc of 90-100 K under the condition of the deposition at 550 and the in-situ annealing in 200 Torr O2 and the post-deposition annealing at 860.

Gold nanoparticles (GNPs) are often used as island electrodes of single-electron (SE) devices. One of technical challenges in fabrication of SE devices with GNPs is the placement of GNPs in a nanogap between two lead electrodes. Utilization of dielectrophoresis (DEP) phenomena is one of possible solutions for this challenge, whereas the fabrication process with DEP includes stochastic aspects. In this brief paper, we present our experimental results on electric resistance of GNP arrays assembled by DEP. More than 300 pairs of electrodes were investigated under various DEP conditions by trial and error approach. We evaluated the relationship between the DEP conditions and the electric resistance of assembled GNP arrays, which would indicate possible DEP conditions for fabrication of SE devices.

We present analytical expression for inductance of a superconducting stripline, a strip sandwiched by two superconducting ground planes. In our method, we utilize the analytical formula for a perfect-conducting stripline derived by Chang in 1976. To utilize Chang's formula, we first transform the structure of a superconducting stripline into that of a perfect-conducting stripline by reducing the thicknesses of the superconducting layers. The thickness reduction is "λ coth (t/λ)" for each (upper or lower) side, where λ and t are the field penetration depth and the layer thickness, respectively. Then, we apply Chang's formula to the transformed stripline model. The calculated results are in good agreement with the numerical and experimental results.

The three-bit balanced ternary quantum voltage generator was designed and tested. This voltage generator is based on zero-crossing Shapiro steps (ZCSSs) in asymmetric two-junction SQUID. ZCSSs were observed on the current-voltage curves, and maximum and minimum current of ZCSSs were almost same, respectively for the three bits. 27-step quantum voltages from -13Φ0f to +13 Φ0f were observed by combinations of inputs of bit1, bit2 and bit3.

In-plane-aligned a-axis-oriented YBa2Cu3O7-δ (YBCO) thin films are attractive for the formation of planar intrinsic Josephson devices. In this study, these films were deposited by dc sputtering on LaSrGaO4 (LSGO) (100) substrates and the dependence of the characteristics on the deposition conditions was investigated. In-plane-aligned a-axis-oriented YBCO thin films were successfully grown in the substrate temperature range of 555-615. With the temperature gradient method, it was seen that the critical temperature of the film increased to 81 K. The current-voltage characteristic along the c-axis exhibited clear multibranch structures. These results indicate that ion-cleaning of the substrate surface broadens the growth temperature range of these films and planar intrinsic Josephson devices can be fabricated from these films.

Superconducting integrated circuits should be operated at low temperature below a half of their critical temperatures. Thermal heat from a bias resistor could rise the temperature in Josephson junctions, and would reduce their critical currents. In this study, we estimate the temperature in a Josephson junction heated by a bias resistor at the bath temperature of 4.2 K, and introduce a parameter β that connects the thermal heat from a bias resistor and the temperature elevation of a Josephson junction. By using β, the temperature in the Josephson junction can be estimated as functions of the current through the resistor.

Although larger scale integration enhances the practicability of superconducting Josephson circuits, several technical problems begin to emerge during its progress. One of the problems is the increase of current through a ground plane (ground current). Excess ground current produces additional magnetic field and reduces operation margins of the circuits, because superconducting Josephson devices are very sensitive to magnetic field. In this paper, we evaluate current distribution in a superconducting ground plane by means of both experiments and numerical calculation. We also verify two methods for suppressing the ground current. One is a slot structure in the ground plane, and the other is alignment of the current-extraction point. Suppression of the ground current is quantitatively evaluated.

High-Tc superconductors convincingly showed that these materials are essentially natural arrays of Josephson junctions formed in atomic scale. In this paper, in-plane aligned a-axis-oriented YBa2Cu3O7-δ (YBCO) thin films were successfully grown on LaSrGaO4(LSGO) (100) substrates which were cleaned by ion-beam. Voltage jumps with hysteresis implying intrinsic Josephson effects are observed in c-axis direction. This result suggest that it is possible to achieve planar intrinsic Josephson devices which have applications in high frequency electronics, such as voltage standards, Josephson masers and so on.