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Ken'ichi HOSOYA Yasuyuki SUZUKI Yasushi AMAMIYA Zin YAMAZAKI Masayuki MAMADA Akira FUJIHARA Masafumi KAWANAKA Shin'ichi TANAKA Shigeki WADA Hikaru HIDA
Application of microwave and millimeter-wave circuit technologies to InGaP-HBT ICs for 40-Gbps optical-transmission systems is demonstrated from two aspects. First, ICs for various important functions -- amplification of data signals, amplification, frequency doubling, and phase control of clock signals -- are successfully developed based on microwave and millimeter-wave circuit configurations mainly composed of distributed elements. A distributed amplifier exhibits ≥164-GHz gain-bandwidth product with low power consumption (PC) of 71.2 mW. A 20/40-GHz-band frequency doubler achieves wideband performance (40%) with low PC (26 mW) by integrating a high-pass filter and a buffer amplifier (as a low-pass filter). A compact 40-GHz analog phase shifter, 20- and 40-GHz-band clock amplifiers with low PC are also realized. Second, a familiar concept in microwave-circuit design is applied to a high-speed digital circuit. A new approach -- inserting impedance-transformer circuits -- to enable 'impedance matching' in digital ICs is successfully applied to a 40-Gbps decision circuit to prevent unwanted gain peaking and jitter increase caused by transmission lines without sacrificing chip size.
Shigeki WADA Masatoshi TOKUSHIMA Masaoki ISHIKAWA Nobuhide YOSHIDA Masahiro FUJII Tadashi MAEDA
Ultra-low-power-consumption and high-speed DCFL circuits have been fabricated by using 0.2-µm Y-shaped gate E/D-heterojunction-FETs (HJFETs) with a high-aspect-ratio gate-structure, which has an advantage of reducing the gate-fringing capacitance (Cf) to about a half of that of a conventional low-aspect-ratio one. A fabricated 51-stage ring oscillator with the 0.2-µm Y-shaped gate n-AlGaAs/i-InGaAs E/D-HJFETs shows the lowest power-delay product of 0.21 fJ with an unloaded propagation delay of 34.9 ps at a supply voltage (VDD) of 0.4 V. We also analyze the DCFL switching characteristics by taking into account the intrinsic gate-to-source capacitance (Cgsint) and the Cf. The analysis results for the power-delay products agree well with our experimental results. Our analysis also indicates the DCFL circuit with the high-aspect-ratio Y-shaped gate E/D-HJFETs can reduce the power-delay products by 35% or more below 0.25-µm gate-length as compared to conventional ones with the low-aspect-ratio Y-shaped gate HJFETs. These results clarify that the Cf-reduction of the Y-shaped gate HJFETs is more effective in improving the power-delay products than reducing the gate-length.