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Masaru SASAGO Takahiro MATSUO Kazuhiro YAMASHITA Masayuki ENDO Kouji MATSUOKA Taichi KOIZUMI Akiko KATSUYAMA Noboru NOMURA
New critical-dimension controlling technique of off-axis illumination for aperiodic patterns has been developed. By means of arranging not-imaging additional pattern near 0.25 micron isolated patterns, the depth of focus of an isolated pattern was improved as well as the periodic patterns. Simulation and experimental results were verified on a 0.48 numerical-aperture, KrF excimer laser stepper. Using new deep-ultra-violet hardening technique for chemically amplified positive resist, the critical dimension loss of resist pattern was prevented. 0.25 micron design rule pattern was obtained with excellent mask linearity without critical-dimension-loss. The combination techniques are achieved quarter micron design rule complex circuit pattern layouts.
Masaru SASAGO Masayuki ENDO Yoshiyuki TANI Satoshi KOBAYASHI Taichi KOIZUMI Takahiro MATSUO Kazuhiro YAMASHITA Noboru NOMURA
This paper describes the potential of KrF excimer laser lithography for the development and production of 64 M and 256 Mbit DRAMs on the basis of our recent developed results. Quarter micron KrF excimer laser lithography has been developed. A new chemically amplified positive resist realizes high stability and process compatibility for 0.25 micron line and space patterns and 0.35 micron contact hole patterns. This developed resist is characterized as the increase of dissolution characteristics in exposed areas, and hence means the high resolution is obtained. A multiple interference effect was greatly reduced by using our over coat film or anti-reflective coating. This over coat film has no intermixing to the resist and it is simultaneously removed when the resist is developed. This anti-reflective coating has low etch selectivity to the resist, and hence the over coat film is etched away when etching the substrate. The two major results indicate that the KrF excimer laser lithography is promising for the development of 256 MDRAMs.
Yegui XIAO Takahiro MATSUO Katsunori SHIDA
Fourier analysis of sinusoidal and/or quasi-periodic signals in additive noise has been used in various fields. So far, many analysis algorithms including the well-known DFT have been developed. In particular, many adaptive algorithms have been proposed to handle non-stationary signals whose discrete Fourier coefficients (DFCs) are time-varying. Notch Fourier Transform (NFT) and Constrained Notch Fourier Transform(CNFT) proposed by Tadokoro et al. and Kilani et al., respectively, are two of them, which are implemented by filter banks and estimate the DFCs via simple sliding algorithms of their own. This paper presents, for the first time, statistical performance analyses of the NFT and the CNFT. Estimation biases and mean square errors (MSEs) of their sliding algorithms will be derived in closed form. As a result, it is revealed that both algorithms are unbiased, and their estimation MSEs are related to the signal frequencies, the additive noise variance and orders of comb filters used in their filter banks. Extensive simulations are performed to confirm the analytical findings.
Eiichi TERAOKA Toru KENGAKU Ikuo YASUI Kazuyuki ISHIKAWA Takahiro MATSUO Hideyuki WAKADA Narumi SAKASHITA Yukihiko SHIMAZU Takeshi TOKUDA
Built-in self-test (BIST) has been applied to test an analog to digital converter (ADC) and a digital to analog converter (DAC) embedded in a DSP-core ASIC. The eight performance characteristics of the ADC and the DAC designed in accordance with the ITU-T recommendations are measured using the BIST. Three of the eight characteristics - the attenuation/frequency distortion, the variation of gain with input level, and the signal-to-total distortion - have been evaluated and the measured results have shown good agreement with measured results by conventional tests. In the BIST operation, the DSP-core generates input stimulus and analyzes output response by control of the self-test program, The sizes of the self-test program and coefficient data are 822 words of the IROM and 384 words of the data ROM, respectively. This area overhead is less than 0.5% of total chip area. Test-time by the BIST is reduced to approximately 3.2 seconds, which is one-tenth that of conventional testing. The mixed-signal DSP-core ASIC is testable with only logic test equipment, and as a result, test-cost - that is test investment and test-time - is reduced compared with conventional test methods.
Yegui XIAO Takahiro MATSUO Katsunori SHIDA
Adaptive Fourier analysis of sinusoidal signals in noise is of essential importance in many engineering fields. So far, many adaptive algorithms have been developed. In particular, a filter bank based algorithm called constrained notch Fourier transform (CNFT) is very attractive in terms of its cost-efficiency and easily controllable performance. However, its performance becomes poor when the signal frequencies are non-uniformly spaced (or spaced with unequal intervals) in the frequency domain. This is because the estimates of the discrete Fourier coefficients (DFCs) in the CNFT are inevitably corrupted by sinusoidal disturbances in such a case. This paper proposes, at first, a modified CNFT (MCNFT), to compensate the performance of the CNFT for noisy sinusoidal signals with known and non-uniformly spaced signal frequencies. Next, performance analysis of the MCNFT is conducted in detail. Closed form expression for the steady-state mean square error (MSE) of every DFC estimate is derived. This expression indicates that the MSE is proportional to the variance of the additive noise and is a complex function of both the frequency of each frequency component and the pole radius of the bandpass filter used in the filter bank. Extensive simulations are presented to demonstrate the improved performance of the MCNFT and the validity of the analytical results.