We have analyzed a very short channel tunneling field effect transistor which uses new heterostructures (CoSi2/Si/CdF2/CaF2) lattice-matched to the Si substrate. In device operation, the drain current from source (CoSi2) to drain (CoSi2) through tunnel barriers (Si) and the channel (CdF2) is controlled by a gate electric field applied to the barrier between the source and the channel through the gate insulator (CaF2). Theoretical analysis shows that this transistor has characteristics similar to those of conventional metal-oxide-semiconductor field effect transistors even with channel lengths as short as 5 nm. In addition, we have estimated the theoretical response time of this transistor and showed the possibility of subpicosecond response.

A new rewritable medium utilizing a guest-host (G-H) polymer-dispersed liquid-crystal (PDLC) film has been developed in our laboratory. The medium is thermally written and electrically erased. It is portable, like paper, and can store recorded data because of the memory effect of smectic-A liquid crystal (SmA LC), which exhibits bistable states of homeotropic and focal conic alignment. Dichroic dye is added to the SmA LC to form the G-H type. An evaluation of the characteristics revealed that this medium exhibits both high contrast and good reliability.

This paper proposes novel test techniques for high accuracy measurement of ADCs and a ramp generator on a CMOS image sensor (CIS) chip. The test circuit for the ADCs has a dual path and has an ability of multi-functional fine pattern generator that can define any input for each column to evaluate CIS specific characteristics electrically. The test circuit for the ramp generator can realize an on-chip current cell test and reject the current cell failure within 1LSB accuracy. We fabricated the test sensor using 55nm CIS process and measured the IP characteristics. Measured results show INL of 14.6LSB, crosstalk of 14.9LSB and column interference noise of 5.4LSB. These measured results agree with the designed values. By using this technique, we confirmed the accurate ADC measurement can be realized without being affected by the ambiguity of the optical input.

The major task in compact modeling for high power devices is to predict the switching waveform accurately because it determines the energy loss of circuits. Device capacitance mainly determines the switching characteristics, which makes accurate capacitance modeling inevitable. This paper presents a newly developed compact model HiSIM-GaN [Hiroshima University STARC IGFET Model for Gallium-Nitride-based High Electron Mobility Transistors (GaN-HEMTs)], where the focus is given on the accurate modeling of the field-plate (FP), which is introduced to delocalize the electric-field peak that occurs at the electrode edge. We demonstrate that the proposed model reproduces capacitance measurements of a GaN-HEMT accurately without fitting parameters. Furthermore, the influence of the field plate on the studied circuit performance is analyzed.