The method of constructing a graph G with the maximum cardinality of minimum cut-sets, which is 2e/n, has been obtained by Harary in 1962, where n is the number of nodes and e is the number of edges. Afterward, the problem of finding a simple graph G which minimizes the number of minimum cut-sets with cardinality 2e/n subject to λ(G)2e/n was solved by Bauer, Boesch, Suffel and Tindell in 1985. Generalizing this, a necessary and sufficient condition for a simple graph with n nodes and e edges to minimize the number of cut-sets with cardinality z has been recently presented by Sun, Nagamochi and Kusunoki in 1989, where z is chosen such that 2e/nz22e/n3 for2e/n3, or z2, 3, for2e/n2. In this paper, we generalize the above results to multiple graphs, and give a necessary and sufficient condition for a multiple graph G with n nodes and e edges to minimize the number of minimum cut-sets whose cardinality is2e/n.

The effect of wavelength detuning on the device performance of identical-epitaxial-layer (IEL) electroabsorption (EA) modulator integrated distributed feedback (DFB) lasers is studied in detail. Based on the lasing behavior of integrated devices with different amount of wavelength detuning and the photocurrent spectra under different reverse biases, the optimal wavelength detuning is experimentally determined to be around 30-40 nm for our IEL integrated devices. By adopting gain-coupled DFB laser section, integrated devices with optimal wavelength detuning have demonstrated excellent single mode performances. The extinction ratio is measured to be greater than 15 dB at -3 V, and the modulation bandwidth is around 8 GHz.

The effect of wavelength detuning on the device performance of identical-epitaxial-layer (IEL) electroabsorption (EA) modulator integrated distributed feedback (DFB) lasers is studied in detail. Based on the lasing behavior of integrated devices with different amount of wavelength detuning and the photocurrent spectra under different reverse biases, the optimal wavelength detuning is experimentally determined to be around 30-40 nm for our IEL integrated devices. By adopting gain-coupled DFB laser section, integrated devices with optimal wavelength detuning have demonstrated excellent single mode performances. The extinction ratio is measured to be greater than 15 dB at -3 V, and the modulation bandwidth is around 8 GHz.

This paper presents a miniaturized transformer-based ultra-low-power (ULP) LC-VCO with embedded supply pushing reduction techniques for IoT applications in 65-nm CMOS process. To reduce the on-chip area, a compact transformer patterned ground shield (PGS) is implemented. The transistors with switchable capacitor banks and associated components are placed underneath the transformer, which further shrinking the on-chip area. To lower the power consumption of VCO, a gm-stacked LC-VCO using the transformer embedded with PGS is proposed. The transformer is designed to provide large inductance to obtain a robust start-up within limited power consumption. Avoiding implementing an off/on-chip Low-dropout regulator (LDO) which requires additional voltage headroom, a low-power supply pushing reduction feedback loop is integrated to mitigate the current variation and thus the oscillation amplitude and frequency can be stabilized. The proposed ULP TF-based LC-VCO achieves phase noise of -114.8dBc/Hz at 1MHz frequency offset and 16kHz flicker corner with a 103µW power consumption at 2.6GHz oscillation frequency, which corresponds to a -193dBc/Hz VCO figure-of-merit (FoM) and only occupies 0.12mm2 on-chip area. The supply pushing is reduced to 2MHz/V resulting in a -50dBc spur, while 5MHz sinusoidal ripples with 50mVPP are added on the DC supply.

This paper presents a high jitter performance injection-locked clock multiplier (ILCM) using an ultra-low power (ULP) voltage-controlled oscillator (VCO) for IoT application in 65-nm CMOS. The proposed transformer-based VCO achieves low flicker noise corner and sub-100µW power consumption. Double cross-coupled NMOS transistors sharing the same current provide high transconductance. The network using high-Q factor transformer (TF) provides a large tank impedance to minimize the current requirement. Thanks to the low current bias with a small conduction angle in the ULP VCO design, the proposed TF-based VCO's flicker noise can be suppressed, and a good PN can be achieved in flicker region (1/f3) with sub-100µW power consumption. Thus, a high figure-of-merit (FoM) can be obtained at both 100kHz and 1MHz without additional inductor. The proposed VCO achieves phase noise of -94.5/-115.3dBc/Hz at 100kHz/1MHz frequency offset with a 97µW power consumption, which corresponds to a -193/-194dBc/Hz VCO FoM at 2.62GHz oscillation frequency. The measurement results show that the 1/f3 corner is below 60kHz over the tuning range from 2.57GHz to 3.40GHz. Thanks to the proposed low power VCO, the total ILCM achieves 78 fs RMS jitter while using a high reference clock. A 960 fs RMS jitter can be achieved with a 40MHz common reference and 107µW corresponding power.