This study deals with two linear precoders: the maximization of the minimum Euclidean distance between received symbol-vectors, called here max-dmin, and the maximization of the post-processing signal-to-noise ratio termed max-SNR or beamforming. Both have been designed for reliable MIMO transmissions operating over uncorrelated Rayleigh fading channels. Here, we will explain why performances in terms of bit error rates show a significant enhancement of the max-dmin over the max-SNR whenever the number of antennas is increased. Then, from theoretical developments, we will demonstrate that, like the max-SNR precoder, the max-dmin precoder achieves the maximum diversity order, which is warrant of reliable transmissions. The current theoretical knowledge will be applied to the case-study of a system with two transmit- or two receive-antennas to calculate the probability density functions of two channel parameters directly linked to precoder performances for uncorrelated Rayleigh fading channels. At last, this calculation will allow us to quickly get the BER of the max-dmin precoder further to the derivation of a tight semi-theoretical approximation.

Devices DC, RF, and microwave power performances between Al0.3Ga0.7As/In0.15Ga0.85As double doped-channel FET (D-DCFETs), conventional doped-channel FETs (DCFETs) and HEMTs are compared with each other. Device linearity and power performance have been improved by a double doped-channel design. The D-DCFETs provides a higher current density, higher gate breakdown voltage, and improves gate operation bias range as well as frequency performance. The linear power gain and output power for D-DCFETs is 19 dB and 305 mW/mm with a power-added efficiency of 52% at Vds = 2.5 V under a 1.9 GHz operation. These advantages suggest that double doped-channel design is more suitable for a high linearity and high microwave power device applications.

There are more and more information services provided on the wireless networks. Due to long network delay of wireless links, transactions will be long-lived transactions. In such a situation, the occurrence of handoff is inevitable, and thus a wireless link held by a mobile unit crossing cell boundaries might be forced to terminate. It is undesirable that an active transaction is forced to terminate. A queueing scheme has been proposed to solve the problem of forced termination of transactions in our previous research. However, when 2PL protocol is employed, suspending an active transaction will elongate the lock holding time and thus degrade the system performance. In this paper, we propose two guard channel schemes (GCS), static and dynamic, to reduce the probability of forced termination of transactions. In dynamic GCS, the number of channels reserved in a base station is dynamically assigned according to the number of transaction calls which may handoff to this cell while the number of guard channels is fixed in static GCS. An analytic model based on Markov chain is derived to evaluate the system performance. The correctness of this model is verified by simulation. The experimental results show that a significant improvement is achieved by using the dynamic GCS.

In the basic user/network interface of ISDN (ITU-T Recommendation I. 430), the D-channel is shared by up to 8 terminals for signal and data packets. An analytical model is proposed to reveal the performance characteristics of the access control scheme for the D-channel. Numerical and simulation results are shown to demonstrate the performance differentiation of the terminals with different priorities. It is observed that the mean signal delay at low load may become large because of long service time for packets, and that the priority mechanism may not work properly when the loads at terminals are very asymmetric.

High-frequency capacitance-voltage (C-V) characteristics of buried-channel MOS capacitors with a structure of subquarter-micron pMOS have been measured and analyzed, emphasizing transient behavior. The C-V characteristics, including transient behavior, of buried-channel MOS capacitors that have a counter-doped p layer at the surface of n substrate are very similar to those of surface-channel MOS capacitors of n substrate if the counter-doped layer is shallow enough to be fully inverted at large positive bias. As gate voltage is decreased, equilibrium capacitance for inversion (accumulation for the counter-doped layer) reaches a minimum value and then slightly increases to saturate, which is peculiar to buried-channel capacitors. The gate voltage for minimum capacitance, which has been used to estimate the threshold voltage, changes dramatically by illumination even in room light. Net doping profiles of n-type dopant can be obtained from pulsed C-V characteristics even for buried-channel capacitors. For MOS capacitors with thinner gate oxide (5 nm), steady-state C-V curve is not an equilibrium one but a deep depletion one at room temperature. This is because holes are drained away by tunneling through the thin gate oxide.