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241-260hit(260hit)

  • Finding All Solutions of Piecewise-Linear Resistive Circuits Containing Neither Voltage nor Current Controlled Resistors

    Kiyotaka YAMAMURA  

     
    LETTER-Nonlinear Circuits and Systems

      Vol:
    E77-A No:3
      Page(s):
    573-576

    Recently, efficient algorithms that exploit the separability of nonlinear mappings have been proposed for finding all solutions of piecewise-linear resistive circuits. In this letter, it is shown that these algorithms can be extended to circuits containing piecewise-linear resistors that are neither voltage nor current controlled. Using the parametric representation for these resistors, the circuits can be described by systems of nonlinear equations with separable mappings. This separability is effectively exploited in finding all solutions. A numerical example is given, and it is demonstrated that all solutions are computed very rapidly by the new algorithm.

  • Mixed Mode Circuit Simulation Using Dynamic Network Separation and Selective Trace

    Masakatsu NISHIGAKI  Nobuyuki TANAKA  Hideki ASAI  

     
    PAPER-Modeling and Simulation

      Vol:
    E77-A No:3
      Page(s):
    454-460

    For the efficient circuit simulation, several direct/relaxation-based mixed mode simulation techniques have been studied. This paper proposes the combination of selective trace, which is well-known in the logic simulation, with dynamic network separation. In the selective trace method, the time points to be analyzed are selected for each subcircuit. Since the separation technique enables the analysis of each subcircuit independently, it is possible to skip solving the latent subcircuits, according to selective trace. Selecting the time points in accordance with activity of each subcircuit is analogous to multirate numerical integration technique used in the waveform relaxation algorithm.

  • Reliability of a 3-State System Subject to Flow Quantity Constraint

    Tetsushi YUGE  Masafumi SASAKI  Shigeru YANAGI  

     
    PAPER-System Reliability

      Vol:
    E77-A No:1
      Page(s):
    129-133

    This paper presents two approaches for computing the reliability of complex networks subject to two kinds of failure, open failure and shorted failure. The reliabilities of some series-parallel networks are considered by many analysts. However a practical system is more complex. The methods given in this paper can be applied not only to a series-parallel network but also to a non-series-parallel network which is composed of non-identical and independent components subject to two kinds of failure. This paper also deals with a network subject to flow quantity constraint such as the one which is required to control j or more separate paths. For such a system it is difficult to obtain system reliability because the number of states to be considered in this system is extremely large compared to a conventional 2-state device system. In this paper we obtain the reliabilities for such systems by a combinatorial approach and by a simulation approach.

  • A Sign Test for Finding All Solutions of Piecewise-Linear Resistive Circuits

    Kiyotaka YAMAMURA  

     
    PAPER-Nonlinear Circuits and Systems

      Vol:
    E77-A No:1
      Page(s):
    317-323

    An efficient algorithm is presented for finding all solutions of piecewise-linear resistive circuits. In this algorithm, a simple sign test is performed to eliminate many linear regions that do not contain a solution. This makes the number of simultaneous linear equations to be solved much smaller. This test, in its original form, is applied to each linear region; but this is time-consuming because the number of linear regions is generally very large. In this paper, it is shown that the sign test can be applied to super-regions consisting of adjacent linear regions. Therefore, many linear regions are discarded at the same time, and the computational efficiency of the algorithm is substantially improved. The branch-and-bound method is used in applying the sign test to super-regions. Some numerical examples are given, and it is shown that all solutions are computed very rapidly. The proposed algorithm is simple, efficient, and can be easily programmed.

  • MTBF for Consecutive-k-out-of-n: F Systems with Nonidentical Component Availabilities

    Masafumi SASAKI  Naohiko YAMAGUCHI  Tetsushi YUGE  Shigeru YANAGI  

     
    PAPER-System Reliability

      Vol:
    E77-A No:1
      Page(s):
    122-128

    Mean Time Between Failures (MTBF) is an important measure of practical repairable systems, but it has not been obtained for a repairable linear consecutive-k-out-of-n: F system. We first present a general formula for the (steady-state) availability of a repairable linear consecutive-k-out-of-n: F system with nonidentical components by employing the cut set approach or a topological availability method. Second, we present a general formula for frequency of system failures of a repairable linear consecutive-k-out-of-n: F system with nonidentical components. Then the MTBF for the repairable linear consecutive-k-out-of-n: F system is shown by using the frequency of system failure and availability. Lastly, we derive some figures which show the relationship between the MTBF and repair rate µorρ(=λ/µ) in the repairable linear consecutive-k-out-of-n: F system. The figures can be easily used and are useful for reliability design.

  • Piecewise-Linear Analysis of Nonlinear Resistive Networks Containing Gummel-Poon Models or Shichman-Hodges Models

    Kiyotaka YAMAMURA  

     
    PAPER-Nonlinear Circuits and Systems

      Vol:
    E77-A No:1
      Page(s):
    309-316

    Finding DC solutions of nonlinear networks is one of the most difficult tasks in circuit simulation, and many circuit designers experience difficulties in finding DC solutions using Newton's method. Piecewise-linear analysis has been studied to overcome this difficulty. However, efficient piecewiselinear algorithms have not been proposed for nonlinear resistive networks containing the Gummel-Poon models or the Shichman-Hodges models. In this paper, a new piecewise-linear algorithm is presented for solving nonlinear resistive networks containing these sophisticated transistor models. The basic idea of the algorithm is to exploit the special structure of the nonlinear network equations, namely, the pairwise-separability. The proposed algorithm is globally convergent and much more efficient than the conventional simplical-type piecewise-linear algorithms.

  • Speech Recognition of lsolated Digits Using Simultaneous Generative Histogram

    Yasuhisa HAYASHI  Akio OGIHARA  Kunio FUKUNAGA  

     
    LETTER

      Vol:
    E76-A No:12
      Page(s):
    2052-2054

    We propose a recognition method for HMM using a simultaneous generative histogram. Proposed method uses the correlation between two features, which is expressed by a simultaneous generative histogram. Then output probabilities of integrated HMM are conditioned by the codeword of another feature. The proposed method is applied to isolated digit word recognition to confirm its validity.

  • An Effective Defect-Repair Scheme for a High Speed SRAM

    Sadayuki OOKUMA  Katsuyuki SATO  Akira IDE  Hideyuki AOKI  Takashi AKIOKA  Hideaki UCHIDA  

     
    PAPER-SRAM

      Vol:
    E76-C No:11
      Page(s):
    1620-1625

    To make a fast Bi-CMOS SRAM yield high without speed degradation, three defect-repair methods, the address comparison method, the fuse decoder method and the distributed fuse method, were considered in detail and their advantages and disadvantages were made clear. The distributed fuse method is demonstrated to be further improved by a built-in fuse word driver and a built-in fuse column selector, and fuse analog switches. This enhanced distributed fuse scheme was examined in a fast Bi-CMOS SRAM. A maximun access time of 14 ns and a chip size of 8.8 mm17.4 mm are expected for a 4 Mb Bi-CMOS SRAM in the future.

  • A Simple Algorithm for Finding All Solutions of Piecewise-Linear Resistive Circuits

    Kiyotaka YAMAMURA  

     
    PAPER-Nonlinear Circuits and Systems

      Vol:
    E76-A No:10
      Page(s):
    1812-1821

    An efficient algorithm is presented for finding all solutions of piecewise-linear resistive circuits. In this algorithm, a simple sign test is performed to eliminate many linear regions that do not contain a solution. Therefore, the number of simultaneous linear equations to be solved is substantially decreased. This test, in its original form, requires O(Ln2) additions and comparisons in the worst case, where n is the number of variables and L is the number of linear regions. In this paper, an effective technique is proposed that reduces the computational complexity of the sign test to O(Ln). Some numerical examples are given, and it is shown that all solutions can be computed very efficiently. The proposed algorithm is simple and can be easily programmed by using recursive functions.

  • Evaluations for Estimation of an Information Source Based on State Decomposition

    Joe SUZUKI  

     
    PAPER-Information Theory and Coding Theory

      Vol:
    E76-A No:7
      Page(s):
    1240-1251

    This paper's main objective is to analyze several procedures which select the model g among a set G of stochastic models to minimize the value of an information criterion in the form of L(g)H[g](zn)+(k(g)/2)c(n), where zn is the n observed data emitted by an information source θ which consists of the model gθ∈G and k(gθ) mutually independent stochastic parameters in the model gθ∈G, H[g](zn) is (-1) (the maximum log likelihood value of the data zn with respect to a model g∈G), and c(n) is a predetermined function (penalty function) of n which controls the amount of penalty for increasing the model size. The result is focused on specific performances when the information criteria are applied to the framework of so-called state decomposition. Especially, upper bounds are derived of the following two performance measures for each penalty function c(n): the error probability of the model selection, and the average Kullback-Leibler information between the true information source and the estimated information source.

  • Linear Transformations between Embedded Processes Associated with M/M/1 Queueing Systems

    Toshikane ODA  Aurel A. LAZAR  

     
    PAPER

      Vol:
    E75-B No:12
      Page(s):
    1308-1314

    The embedded Markov processes associated with Markovian queueing systems are closely related, and their relationships are important for establishing an analytical basis for performance evaluation techniques. As a first step, we analyze the embedded processes associated with a general M/M/1 queueing system. Linear transformations between the infinitesimal generators and the transition probability matrices of embedded processes at arrival and departure times are explicitly derived. Based upon these linear transformations, the equilibrium distributions of the system states at arrival and departure times are obtained and expressed in terms of the equilibrium distribution at arbitrary times. The approach presented here uncovers an underlying algebraic structure of M/M/1 queueing systems, and establishes an algebraic methodology for analyzing the equilibrium probabilities of the system states at arrival and departure times for more general Markovian queueing systems.

  • Detecting Separability of Nonlinear Mappings Using Computational Graphs

    Kiyotaka YAMAMURA  Masahiro KIYOI  

     
    LETTER-Analog Circuits and Signal Processing

      Vol:
    E75-A No:12
      Page(s):
    1820-1825

    Separability is a valuable property of nonlinear mappings. By exploiting this property, computational complexity of many numerical algorithms can be substantially reduced. In this letter, a new algorithm is presented that detects the separability of nonlinear mappings using the concept of "computational graph". A hybrid algorithm using both the top-down search and the bottom-up search is proposed. It is shown that this hybrid algorithm is advantageous in detecting the separability of nonlinear simultaneous functions.

  • Simplified Modeling for Call Control Scheme

    Hiroshi KAWASHIMA  

     
    INVITED PAPER

      Vol:
    E75-B No:10
      Page(s):
    923-930

    This paper surveys modeling techniques for telephone call control based on a Finite State Machine (FSM) concept, and studies model simplification techniques. First, the basic concept and fundamental issues of call control modeling are described. Then, based on the analysis of layered call control configuration, it is clarified that the call control machine decomposition within the two-party service control layer has the effect of reducing the apparent size of each mate's machine. Using this effect, guidelines for call control modeling are derived, by which multiple services can be modeled independently. Finally implementation techniques and a few examples of application will be presented.

  • Design of Generalized Document Viewer Using Object Chain Representation

    Nobuhiro AJITOMI  

     
    PAPER

      Vol:
    E75-D No:5
      Page(s):
    690-696

    This paper proposes the GDV system, which provides a format-independent interface with which to access documents in various formats. It also proposes a new approach for document representation to be used in the GDV system. In this approach, a document is represented by a chain of objects, each of which belongs to a certain class and transforms access operations according to the class-specific transformation rule. A user's request is interpreted as a request to the uppermost object of the chain, transformed by objects in the chain successively, and executed by the lowermost object in the chain. The initial state of a document is an object chain containing an unidentified object. As the unidentified object identifies and divides itself, classification (and chain generation) proceeds step by step.

  • An SVQ-HMM Training Method Using Simultaneous Generative Histogram

    Yasuhisa HAYASHI  Satoshi KONDO  Nobuyuki TAKASU  Akio OGIHARA  Shojiro YONEDA  

     
    LETTER

      Vol:
    E75-A No:7
      Page(s):
    905-907

    This study proposes a new training method for hidden Markov model with separate vector quantization (SVQ-HMM) in speech recognition. The proposed method uses the correlation of two different kinds of features: cepstrum and delta-cepstrum. The correlation is used to decrease the number of reestimation for two features thus the total computation time for training models decreases. The proposed method is applied to Japanese language isolated dgit recognition.

  • Design of Three-Dimensional Digital Filters for Video Signal Processing via Decomposition of Magnitude Specifications

    Masayuki KAWAMATA  Takehiko KAGOSHIMA  Tatsuo HIGUCHI  

     
    PAPER-Design and Implementation of Multidimensional Digital Filters

      Vol:
    E75-A No:7
      Page(s):
    821-829

    This paper proposes an efficient design method of three-dimensional (3-D) recursive digital filters for video signal processing via decomposition of magnitude specifications. A given magnitude specification of a 3-D digital filter is decomposed into specifications of 1-D digital filters with three different (horizontal, vertical, and temporal) directions. This decomposition can reduce design problems of 3-D digital filters to design problems of 1-D digital filters, which can be designed with ease by conventional methods. Consequently, design of 3-D digital filters can be efficiently performed without complicated tests for stability and large amount of computations. In order to process video signal in real time, the 1-D digital filters with temporal direction must be causal, which is not the case in horizontal and vertical directions. Since the proposed method can approximate negative magnitude specifications obtained by the decomposition with causal 1-D R filters, the 1-D digital filters with temporal direction can be causal. Therefore the 3-D digital filters designed by the proposed method is suitable for real time video signal processing. The designed 3-D digital filters have a parallel separable structure having high parallelism, regularity and modularity, and thus is suitable for high-speed VLSI implementation.

  • Design of Circularly Symmetric Two-Dimensional R Lowpass Digital Filters With Constant Group Delay Using McClellan Transformations

    Kiyoshi NISHIKAWA  Russell M. MERSEREAU  

     
    PAPER-Design and Implementation of Multidimensional Digital Filters

      Vol:
    E75-A No:7
      Page(s):
    830-836

    We present a successful method for designing 2-D circularly symmetric R lowpass filters with constant group delay. The procedure is based on a transformation of a 1-D prototype R filter with constant group delay, whose magnitude response is the 2-D cross-sectional response. The 2-D filter transfer function has a separable denominator and a numerator which is obtained from the prototype numerator by means of a series of McClellan transformations whose free parameters can be optimized by successive procedure. The method is illustrated by an example.

  • Separating Capabilities of Three Layer Neural Networks

    Ryuzo TAKIYAMA  

     
    SURVEY PAPER-Neural Systems

      Vol:
    E75-A No:5
      Page(s):
    561-567

    This paper reviews the capability of the three layer neural network (TLNN) with one output neuron. The input set is restricted to a finite subset S of En, and the TLNN implements a function F such as F : S I={1, -1}, i,e., F is a dichotomy of S. How many functions (dichotomies) can it compute by appropriately adjusting parameters in the TLNN? Brief historical review, some theorems on the subject obtained so far, and related topics are presented. Several open problems are also included.

  • An NC Algorithm for Computing Canonical Forms of Graphs of Bounded Separator

    Tatsuya AKUTSU  

     
    LETTER

      Vol:
    E75-A No:4
      Page(s):
    512-514

    Lingas developed an NC algorithm for subgraph isomorphism for connected graphs of bounded separator and bounded valence. We present an NC algorithm for computing canonical forms of graphs of bounded separator by using the similar technique.

  • Exploiting Separability in Numerical Analysis of Nonlinear Systems

    Kiyotaka YAMAMURA  

     
    INVITED PAPER

      Vol:
    E75-A No:3
      Page(s):
    285-293

    The aim of this article is to show the effectiveness of exploiting separability in numerical analysis of nonlinear systems. Separability is a valuable property of nonlinear mappings which appears with surprising frequency in science and engineering. By exploiting this property, computational complexity of many numerical algorithms can be substantially improved. However, this idea has not been received much attention in the fields of electronics, information and communication engineerings. In recent years, efficient algorithms that exploit the separability have been proposed in the areas of circuit analysis, homotopy methods, integer labeling methods, nonlinear programming, information theory, numerical differentiation, and neural networks. In this article, these algorithms are surveyed, and it is shown that considerable improvement of computational efficiency can be achieved by exploiting the separability.

241-260hit(260hit)