The present study proposes a scheme in which variable-length orthogonal codes generated by combining inverse discrete Fourier transform matrices over a finite field multiplex user data into a multiplexed sequence and its sequence forms one or a plural number of codewords for Reed-Solomon coding. The proposed scheme realizes data multiplexing, error correction coding, and multi-rate transmitting at the same time. This study also shows a design example and its performance analysis of the proposed scheme.

For an [n, k, d] (r, δ)-locally repairable codes ((r, δ)-LRCs), its minimum distance d satisfies the Singleton-like bound. The construction of optimal (r, δ)-LRC, attaining this Singleton-like bound, is an important research problem in recent years for thier applications in distributed storage systems. In this letter, we use Reed-Solomon codes to construct two classes of optimal (r, δ)-LRCs. The optimal LRCs are given by the evaluations of multiple polynomials of degree at most r - 1 at some points in Fq. The first class gives the [(r + δ - 1)t, rt - s, δ + s] optimal (r, δ)-LRC over Fq provided that r + δ + s - 1≤q, s≤δ, s

This paper proposes a secure distributed transmission method that establishes multiple transmission routes in space to a destination. In the method, the transmitted information is divided into pieces of information by a secret-sharing method, and the generated pieces are separately transmitted to the destination through different transmission routes using individually-controlled antenna directivities. As the secret-sharing method can divide the transmitted information into pieces in such a manner that nothing about the original information is revealed unless all the divided pieces are obtained, the secrecy of the transmitted information is greatly improved from an information-theoretic basis. However, one problem is that it does not perform well in the vicinity around the receiver. This is due to the characteristics of distributed transmission that all distributed pieces of information must eventually gather at the destination; an eavesdropper can obtain the necessary pieces to reconstruct the original information. Then, this paper expands the distributed transmission method into a two-way communication scheme. By adopting the distributed transmission in both communication directions, a secure link can be provided as a feedback channel to enhance the secrecy of the transmitted information. The generation of the shared pieces of information is given with signal forms, and the secrecy of the proposed method is evaluated based on the signal transmission error rates as determined by computer simulation.

Optical orthogonal signature pattern codes (OOSPCs) have attracted great attention due to their important application in the spatial code-division multiple-access network for image transmission. In this paper, we give a construction for OOSPCs based on cyclic codes over Fp. Applying this construction with the Reed-Solomon codes and the generalized Berlekamp-Justesen codes, we obtain two classes of asymptotically optimal OOSPCs.

Many studies have applied the three-dimensional discrete wavelet transform (3D DWT) to video coding. It is known that corruptions of the lowest frequency sub-band (LL) coefficients of 3D DWT severely affect the visual quality of video. Recently, we proposed an error resilient 3D DWT video coding method (the conventional method) that employs dispersive grouping and an error concealment (EC). The EC scheme of our conventional method adopts a replacement technique of the lost LL coefficients. In this paper, we propose a new 3D DWT video transmission method in order to enhance error resilience. The proposed method adopts an error correction scheme using invertible codes to protect LL coefficients. We use half-rate Reed-Solomon (RS) codes as invertible codes. Additionally, to improve performance by using the effect of interleave, we adopt a new configuration scheme at the RS encoding stage. The evaluation by computer simulation compares the performance of the proposed method with that of other EC methods, and indicates the advantage of the proposed method.

A Reed-Solomon (RS) decoder is designed based on the pipelined recursive Euclidean algorithm in the key equation solution. While the Euclidean algorithm uses less Galois multipliers than the modified Euclidean (ME) and reformulated inversionless Berlekamp-Massey (RiBM) algorithms, division between two elements in Galois field is required. By implementing the division with a multi-cycle Galois inverter and a serial Galois multiplier, the proposed key equation solver architecture achieves lower complexity than the conventional ME and RiBM based architectures. The proposed RS (255,239) decoder reduces the hardware complexity by 25.9% with 6.5% increase in decoding latency.

Secret sharing is a method of information protection for security. The information is divided into n shares and reconstructed from any k shares, but no knowledge of the information is revealed from k-1 shares. Physical layer security is a method of achieving favorable reception conditions at the destination terminal in wireless communications. In this study, we propose a security enhancement technique for wireless packet communications. The technique uses secret sharing and physical layer security to exchange a secret encryption key. The encryption key for packet information is set as the secret information in secret sharing, and the secret information is divided into n shares. Each share is located in the packet header. The base station transmits the packets to the destination terminal by using physical layer security based on precoded multi-antenna transmission. With this transmission scheme, the destination terminal can receive more than k shares without error and perfectly recover the secret information. In addition, an eavesdropper terminal can receive less than k-1 shares without error and recover no secret information. In this paper, we propose a protection technique using secret sharing based on systematic Reed-Solomon codes. The technique establishes an advantageous condition for the destination terminal to recover the secret information. The evaluation results by numerical analysis and computer simulation show the validity of the proposed technique.

In this paper, we consider the Reed-Solomon codes over Fqm with evaluations in a subfield Fq. By the “virtual extension”, we can embed these codes into homogeneous interleaved Reed-Solomon codes. Based on this property and the collaborative decoding algorithm, a new probabilistic decoding algorithm that can correct errors up to $rac{m}{m+1}(n-k)$ for these codes is proposed. We show that whether the new decoding algorithm fails or not is only dependent on the error. We also give an upper bound on the failure probability of the new decoding algorithm for the case s=2. The new decoding algorithm has some advantages over some known decoding algorithms.

To improve the BER performance of the conventional cooperative communication, this letter proposes an efficient method for the reliability, and it uses hierarchical modulation that has both the high priority (HP) layer and the low priority (LP) layer. To compensate more reliable transmission, the proposed method uses the error correction capability of Reed-Solomon (RS) codes additionally. The simulation results show that the proposed method can transmit data more reliably than the basic RS coded decode-and-forward (DF) method.

Harn and Lin proposed an algorithm to detect and identify cheaters in Shamir's secret sharing scheme in the journal Designs, Codes and Cryptography, 2009. In particular, their algorithm for cheater identification is inefficient. We point out that some of their conditions for cheater detection and identification essentially follow from those on error detection/correction of Reed-Solomon codes, which have efficient decoding algorithms, while some other presented conditions turn out to be incorrect. The extended and improved version of the above mentioned scheme was recently presented at the conference International Computer Symposium 2012 (and the journal version appeared in the journal IET Information Security). The new scheme, which is ideal (i.e. the share size is equal to that of the secret), attempts to identify cheaters from minimal number of shares (i.e. the threshold of them). We show that the proposed cheater identification is impossible using the arguments from coding theory.

Syndrome key equation solution is one of the important processes in the decoding of Reed-Solomon codes. This paper proposes a low power key equation solver (KES) architecture where the power consumption is reduced by decreasing the required number of multiplications without degrading the decoding throughput and latency. The proposed method employs smaller number of multipliers than a conventional low power KES architecture. The critical path in the proposed KES circuit is minimized so that the operation at a high clock frequency is possible. A low power folded KES architecture is also proposed to further reduce the hardware complexity by executing folded operations in a pipelined manner with a slight increase in decoding latency.

Reed-Solomon (RS) code is one of the well-known and widely used error correction codes. Among the components of a hardware RS decoder, the key equation solver (KES) unit occupies a relatively large portion of the hardware. It is important to develop an efficient KES architecture to implement efficient RS decoders. In this paper, a novel polynomial division technique used in the Euclidean algorithm (EA) of the KES is presented which achieves the short critical path delay of one Galois multiplier and one Galois adder. Then a KES architecture with the EA is proposed which is efficient in the sense of the product of area and time.

A high-speed low-complexity time-multiplexing Reed-Solomon-based forward error correction architecture based on the pipelined truncated inversionless Berlekamp-Massey algorithm is presented in this paper. The proposed architecture has very high speed and very low hardware complexity compared with conventional Reed-Solomon-based forward error correction architectures. Hardware complexity is improved by employing a truncated inverse Berlekamp-Massey algorithm. A high-speed and high-throughput data rate is facilitated by employing a three-parallel processing pipelining technique and modified syndrome computation block. The time-multiplexing method for pipelined truncated inversionless Berlekamp-Massey architecture is used in the parallel Reed-Solomon decoder to reduce hardware complexity. The proposed architecture has been designed and implemented with 90-nm CMOS technology. Synthesis results show that the proposed 16-channel Reed-Solomon-based forward error correction architecture requires 417,600 gates and can operate at 640 MHz to achieve a throughput of 240 Gb/s. The proposed architecture can be readily applied to Reed-Solomon-based forward error correction devices for next-generation short-reach optical communications.

In this paper, a method is proposed for reconstruction of the parameters of a non-binary block encoder using an intercepted sequence of noisy coded data. The proposed method is a generalization of the Barbier's method for the reconstruction of binary block codes to the more problematic case of non-binary codes. It has been shown mathematically that considering some revisions in definitions, such a generalization is possible. The proposed method is able to estimate the code parameters such as the code length, the code dimension, number of bits per symbol, and the dual-code subspace, and also to synchronize the sequence. Since the Reed-Solomon code is the most important type of non-binary block codes, an additional method is proposed to reconstruct the generator polynomial in the case of Reed-Solomon codes. The proposed method is evaluated via computer simulations which verify its strength and effectiveness.

In this paper, we derive a simple formula to generate a wide-sense systematic generator matrix(we call it quasi-systematic) B for a Reed-Solomon code. This formula can be utilized to construct an efficient interpolation based erasure-only decoder with time complexity O(n2) and space complexity O(n). Specifically, the decoding algorithm requires 3kr + r2 - 2r field additions, kr + r2 + r field negations, 2kr + r2 - r + k field multiplications and kr + r field inversions. Compared to another interpolation based erasure-only decoding algorithm derived by D.J.J. Versfeld et al., our algorithm is much more efficient for high-rate Reed-Solomon codes.

Decoding of Reed-Solomon (RS) codes requires many arithmetic operations in the Galois field. While the software decoding of RS codes has the advantage of its flexibility to support RS codes of variable parameters, the speed of the software decoding is slower than dedicated hardware RS decoders because arithmetic operations in the Galois field on an ordinary processor require many instruction steps. To achieve fast software decoding of RS codes, it is effective to accelerate Galois operations by both dedicated circuitry and parallel processing. In this paper, an accelerator is proposed which is attached to the base processor to speed up the software decoding of RS codes by parallel execution of Galois operations.

A low-complexity Reed-Solomon (RS) decoder design based on the modified Euclidean (ME) algorithm proposed by Truong is presented in this paper. Low complexity is achieved by reformulating Truong's ME algorithm using the proposed polynomial manipulation scheme so that a more compact polynomial representation can be derived. Together with the developed folding scheme and simplified boundary cell, the resulting design effectively reduces the hardware complexity while meeting the throughput requirements of optical communication systems. Experimental results demonstrate that the developed RS(255, 239) decoder, implemented in the TSMC 0.18 µm process, can operate at up to 425 MHz and achieve a throughput rate of 3.4 Gbps with a total gate count of 11,759. Compared to related works, the proposed decoder has the lowest area requirement and the smallest area-time complexity.

This paper presents a high-throughput low-complexity four-parallel Reed-Solomon (RS) decoder for high-rate WPAN systems. Four-parallel processing is used to achieve 12-Gbps data throughput and low hardware complexity. Also, the proposed pipelined folded Degree-Computationless Modified Euclidean (fDCME) algorithm is used to implement the key equation solver (KES) block, which provides low hardware complexity for the RS decoder. The proposed four-parallel RS decoder is implemented 90-nm CMOS technology optimized for a 1.2 V supply voltage. The implementation result shows that the proposed RS decoder can be operated at a clock frequency of 400 MHz and has a data throughput 12.8-Gbps. The proposed four-parallel RS decoder architecture has high data processing rate and low hardware complexity. Therefore it can be applied in the FEC devices for next-generation high-rate WPAN systems with data rate of 10-Gbps and beyond.

This paper presents a high-speed, low-complexity VLSI architecture based on the modified Euclidean (ME) algorithm for Reed-Solomon decoders. The low-complexity feature of the proposed architecture is obtained by reformulating the error locator and error evaluator polynomials to remove redundant information in the ME algorithm proposed by Truong. This increases the hardware utilization of the processing elements used to solve the key equation and reduces hardware by 30.4%. The proposed architecture retains the high-speed feature of Truong's ME algorithm with a reduced latency, achieved by changing the initial settings of the design. Analytical results show that the proposed architecture has the smallest critical path delay, latency, and area-time complexity in comparison with similar studies. An example RS(255,239) decoder design, implemented using the TSMC 0.18 µm process, can reach a throughput rate of 3 Gbps at an operating frequency of 375 MHz and with a total gate count of 27,271.

A Generalized Symbol-rate-increased (GSRI) Pragmatic Adaptive Trellis Coded Modulation (ATCM) is applied to a Multi-carrier CDMA (MC-CDMA) system with bi-orthogonal keying is analyzed. The MC-CDMA considered in this paper is that the input sequence of a bi-orthogonal modulator has code selection bit sequence and sign bit sequence. In, an efficient error correction code using Reed-Solomon (RS) code for the code selection bit sequence has been proposed. However, since BPSK is employed for the sign bit modulation, no error correction code is applied to it. In order to realize a high speed wireless system, a multi-level modulation scheme (e.g. MPSK, MQAM, etc.) is desired. In this paper, we investigate the performance of the MC-CDMA with bi-orthogonal keying employing GSRI ATCM. GSRI TC-MPSK can arbitrarily set the bandwidth expansion ratio keeping higher coding gain than the conventional pragmatic TCM scheme. By changing the modulation scheme and the bandwidth expansion ratio (coding rate), this scheme can optimize the performance according to the channel conditions. The performance evaluations by simulations on an AWGN channel and multi-path fading channels are presented. It is shown that the proposed scheme has remarkable throughput performance than that of the conventional scheme.