The hardware implementation of a neural network model using stochastic logic has been able to integrate numerous neuron units on a chip. However, the limitation of applications occurred since the stochastic neurosystem could execute only discrete-time dynamics. We have contrived a neuron model with continuous-time dynamics by using stochastic calculations. In this paper, we propose the circuit design of a new neuron circuit, and show the fabricated neurochip comprising 64 neurons with experimental results. Furthermore, a new asynchronous updating method and a new activation function circuit are proposed. These improvements enhance the performance of the neurochip greatly.

Single electron devices are ultra low power and extremely small devices, and suitable for implementation of large scale integrated circuits. Artificial neural networks (ANNs), which require a large number of transistors for being to be applied to practical use, is one of the possible applications of single electron devices. In order to simplify a single electron circuit configuration, we apply stochastic logic in which various complex operations can be done with basic logic gates. We design basic subcircuits of a single electron stochastic neural network, and confirm that backgate bias control and a redundant configuration are necessary for a feedback loop configuration by computer simulation based on Monte Carlo method. The proposed single electron circuit is well-suited for hardware implementation of a stochastic neural network because we can save circuit area and power consumption by using a single electron random number generator (RNG) instead of a conventional complementary metal oxide semiconductor (CMOS) RNG.

This paper presents a technique for the variation of hysteresis band in delta-sigma modulation. A sinusoidal, and a random hystersis band are combined to achieve an optimal performance in terms of constant switching frequency and the harmonic spikes. The sinusoidal hysteresis band technique produces a constant switching frequency while the random hysteresis band suppresses the harmonic spikes. The effects of various variations of hysteresis band on the harmonic spectrum characteristic were described. The technique is experimented in a single-phase inverter and the harmonic peaks and the distortion of output voltage were used to measure the performance of the proposed technique.

The transformation of a data set using a second-order polynomial mapping to find statistically independent components is considered (quadratic independent component analysis or ICA). Based on overdetermined linear ICA, an algorithm together with separability conditions are given via linearization reduction. The linearization is achieved using a higher dimensional embedding defined by the linear parametrization of the monomials, which can also be applied for higher-order polynomials. The paper finishes with simulations for artificial data and natural images.

A readout circuit involving new two step current mode background suppression is studied for 2-dimensional long wavelength infrared focal plane arrays (LWIR FPA's). Buffered direct injection (BDI) and feedback amplifier structure are adopted for input circuit and background suppression circuit, respectively. The pixel circuit is simple and has very small skimming error less than 0.1%. Enough calibration range over 50% as well as long integration time over 1.75 ms can be obtained using this readout circuit.

This paper discusses stability boundaries in an electric power system with dc transmission based on a differential-algebraic equation (DAE) system. The DAE system is derived to analyze transient stability of the ac/dc power system: the differential equation represents the dynamics of the generator and the dc transmission, and the algebraic equation the active and reactive power relationship between the ac system and the dc transmission. In this paper complete characterization of stability boundaries of stable equilibrium points in the DAE system is derived based on an energy function for the associated singularly perturbed (SP) system. The obtained result completely describes global structures of the stability boundaries in solution space of the DAE system. In addition the characterization is confirmed via several numerical results with a stability boundary.

We study the statistical multiplexing performance of self-similar traffic. We consider that input streams have different QoS (Quality of Service) requirements such as loss and delay jitter. By applying the FBM (fractal Brownian motion) model, we present methods of estimating the effective bandwidth of aggregated traffic. We performed simulations to evaluate the QoS performances and the bandwidths required to satisfy them. The comparison between the estimation and the simulation confirms that the estimation could give rough data of the effective bandwidth. Finally, we analyze the bandwidth gain with priority multiplexing against non-prioritized multiplexing and suggest how to get better performance with the right configuration of QoS parameters.

In this letter, we present an efficient stream authentication scheme that is an improvement of SAIDA. It is shown that under the same communication overhead its verification probability is higher than that of SAIDA. Moreover, its computation cost is lower than that of SAIDA.

We propose a robust edge detection method based on independent component analysis (ICA). It is known that most of the basis functions extracted from natural images by ICA are sparse and similar to localized and oriented receptive fields, and in the proposed edge detection method, a target image is first transformed by ICA basis functions and then the edges are detected or reconstructed with sparse components only. Furthermore, by applying a shrinkage algorithm to filter out the components of noise in the ICA domain, we can readily obtain the sparse components of the original image, resulting in a kind of robust edge detection even for a noisy image with a very low SN ratio. The efficiency of the proposed method is demonstrated by experiments with some natural images.

A digital/analog hybrid system is presented which implements the cardinal polynomial spline interpolation of arbitrary degree. Based on the fact that the (m-1)st derivative of a spline of degree m-1 is a staircase function, this system generates a cardinal spline of degree m-1 by m-1 cascaded integrators with a staircase function input. A given sequence of sampled values are transformed by a digital filter into coefficients for the B-spline representation of the spline interpolating the sampled values. The values of its (m-1)st derivative with respect to time are computed by the recurrence formula interpreting differentiation of the spline as difference of the coefficients. Then a digital-to-analog converter generates a staircase function representing the (m-1)st derivative, which is integrated by a cascade of m-1 analog integrators to make the expected spline. In order to cope with the offset errors involved in the integrators, a dynamical sampled-data control is attached. An analog-to-digital converter is employed to sample the output of the cascaded integrators. Target state of the cascaded integrators at each sampling instance is computed from the coefficients for the B-spline representation. The state error between the target and the estimated is compensated by feeding back a weighted sum of the state error to the staircase input.

Arrival of the packet data is acknowledged by detecting the preambles of the received bursty packets. To increase system throughput and reduce transmission latency, a simple and robust signal detection algorithm is required. Furthermore, the threshold for signal detection must be set adaptively for different channel conditions. In this paper, we design and compare three signal detection algorithms for bursty packet systems.

Ag(40 wt%)-Pd(60 wt%) alloy has been widely applied to contact materials installed in various electromechanical devices. However, in application to the down sized relays, failure due to contact resistance is caused easily by both growth of oxide film on the contact surface and low contact force. To solve the increase in contact resistance, an overlay of thin Au or thin Au-Ag (8-10 wt%) has been used on the alloy. Despite this, cleanliness and low hardness of these overlays cause adhesion, or sticking, at contact interface. Increase in contact resistance and sticking are contrary to each other. In order to eliminate these contrary properties, the author studied improving the Ag-Pd alloy with a dopant. Low level of contact resistance for both static and dynamic contacts of Ag-Pd with Mg doping was found even if the contact surface was covered with an oxide contaminant film. This paper presents the excellent contact resistance and adhesion behaviors of Ag-Pd-Mg alloy and their mechanisms, and also presents in the later part, surface contamination behaviors for organic gases.

By modelling the quantization error as additive white noise in the transform domain, Wiener filter is used to reduce quantization noise for DCT coded images in DCT domain. Instead of deriving the spectrum of the transform coefficient, a DPCM loop is used to whiten the quantized DCT coefficients. The DPCM loop predicts the mean for each coefficient. By subtracting the mean, the quantized DCT coefficient is converted into the sum of prediction error and quantization noise. After the DPCM loop, the prediction error can be assumed uncorrelated to make the design of the subsequent Wiener filter easy. The Wiener filter is applied to remove the quantization noise to restore the prediction error. The original coefficient is reconstructed by adding the DPCM predicted mean with the restored prediction error. To increase the prediction accuracy, the decimated DCT coefficients in each subband are interpolated from the overlapped blocks.

Transmission performance of a multi-input multi-output (MIMO) antenna system (i.e., antenna diversity, adaptive antenna array, and space division multiplexing) highly depends on the arrival angle distribution of propagation paths. In this letter, a multipath fading simulator based on distributed scattering model is presented. The impacts of the arrival angle distribution of propagation paths on the bit error rates (BER) performance are measured using an implemented fading simulator and compared with the theoretically predicted performance.

The purpose of this study is to examine the impact of the opening speed on a breaking arc. The opening speeds are 10, 20 and 30 mm/s. The breaking arc is generated in a D.C. 42 V/10.5 A circuit, and the arc voltage, the arc current, the gap length and the arc spectrum intensity are measured. Arc temperature is calculated by using a Boltzmann plot. Even if the opening speed is changed, the arc temperature starts from a high temperature, and falls gradually to 4650-4750 K with time. Namely, the opening speed has no influence on the arc temperature.

A new scheme for evaluation of shapes of pips and craters formed by arc discharges on electrical contact surfaces is proposed. Measuring a height of a pip or a depth of a crater as well as an average diameter thereof with a scanning laser microscope and then putting a plot having the measured values as its vertical and horizontal coordinates enable us to numerically and briefly evaluate shapes of those pips and craters on arc-damaged contact surfaces. Some exemplary results obtained by this evaluation scheme are presented here.

A new algorithm, termed reduced-order Root-MUSIC, for high resolution direction finding is proposed. It requires finding all the roots of a polynomial with an order equaling twice the number of propagating signals. Some Monte Carlo simulations are used to test the effectiveness of the proposed algorithm.

Various effective and draft legislations and rules in Europe (WEEE--Waste Electrical and Electronic Equipment ROHS--Restrictions on the use of certain substances and ELV--End of life of vehicles) and Japan (Recycling Law for Home Electric Appliances) have either targeted restrictions or fully banned on the use of lead, to be enforced from 2001, 2003 and 2006 onwards. Up to now, mainly tin-lead alloys have been used in electronics. The process temperatures usually applied have been in the range of 230. All currently discussed lead-free alternatives for professional electronics need process temperatures which are at least 20 higher. In addition, the process duration is significantly longer. The combination of higher process temperatures and longer duration results in significant thermal stress on electromechanical devices. In particular the precision mechanics of electromechanical relays must withstand the solder process with maximum process temperatures of 255 without dimensional changes. During the transition from tin-lead to lead-free solder processes all combinations of component surfaces and solder must be possible. The selection of pure Sn100 or SnCu0.7 as terminal surface allows mixed assemblies with tin-lead as well as lead-free solders. All tested combinations of terminal surface, PCB surface and solder showed good results. From these results it can be concluded that mixed assemblies are possible during the transition time without any negative impact on the reliability of the electronic devices.

In this article, it is shown that Unified Complex Hadamard Transform (UCHT) can be derived from Walsh functions and through direct matrix operation. Unique properties of UCHT are analyzed. Recursive relations through Kronecker product can be applied to the basic matrices to obtain higher dimensions. These relations are the basis for the flow diagram of a constant-geometry iterative VLSI hardware architecture. New Normalized Complex Hadamard Transform (NCHT) matrices are introduced which are another class of complex Hadamard matrices. Relations of UCHT and NCHT with other discrete transforms are discussed.

An efficient way to optimize the hardware consumption in a low-voltage ΔΣ modulator for D/A converters is described. The modulator employs a ROM selection scheme for multiplications and the new buffer-and-routing ROM structure to minimize the hardware consumption. Furthermore, a guideline of the power-delay-and-area product (PDAP) for compelling issues such as power dissipation, delay time, and chip area consumption in the modern digital-circuit design is proposed. After the validity of the concept has been proved in comparison with that of the conventional guideline of the power-delay product in several behavioral blocks, it was employed in the circuit design. Fabricated in a standard digital 0.35-µm CMOS technology, the modulator achieves a signal-to-noise ratio (SNR) of 96 dB with an oversampling ratio of 256 under the supply of 2.0 V.