In this work, the bias polarity dependent resistive switching behaviors in Cu/Si3N4/p+ Si RRAM memory cell have been closely studied. Different switching characteristics in both unipolar and bipolar modes after the positive forming are investigated. The bipolar switching did not need a forming process and showed better characteristics including endurance cycling, uniformity of switching parameters, and on/off resistance ratio. Also, the resistive switching characteristics by both positive and negative forming switching are compared. It has been confirmed that both unipolar and bipolar modes after the negative forming exhibits inferior resistive switching performances due to high forming voltage and current.

In AlGaN/GaN high electron mobility transistors (HEMTs), Si3N4 passivation film brings effective improvements in the current collapse phenomenon, however, the suppression of this phenomenon in a high voltage operation can not be achieved in only the Si3N4 deposition process. In order to solve this problem, we have demonstrated an NH3-plasma surface pretreatment in the chamber of plasma enhanced chemical vapor deposition (PE-CVD) just before Si3N4 deposition process. We found that the optimized NH3-plasma pretreatment could improve the current collapse as compared with only the Si3N4 deposition and an excessive pretreatment made it worse adversely in AlGaN/GaN-HEMTs. It was confirmed by Auger electron spectroscopy (AES) analysis that the optimized NH3-plasma pretreatment decreased the carbon contamination such as hydrocarbon on the AlGaN surface and the excessive pretreatment degraded the stoicheiometric composition of AlGaN surface.

Material research on capacitor dielectrics for DRAM applications is reviewed. The state of the art technologies to prepare Si3N4,Ta2O5, and SrTiO3 thin films for capacitors are described. The down-scaling limits for Si3N4 and Ta2O5 capacitors seem to be 3.5 and 1.5 nm SiO2 equivalent thickness, respectively. Combined with a rugged polysilicon electrode surface,Si3N4 and Ta2O5 based-capacitors are available for 256 Mbit and 1 Gbit DRAMs. At the present time, the minimum SiO2 equivalent thickness for high permittivity materials is around 1 nm with the leakage current density of 10-7 A/cm2. Among the great variety of ferroelectrics, two families of materials,i.e., Pb (Zr, Ti) O3 and (Ba, Sr) TiO3 have emerged as the most promising candidates for 1 Gbit DRAMs and beyond. If the chemical vapor deposition technology can be established for these materials, capacitor dielectrics should not be a limiting issue for Gbit DRAMs.