This paper proposes a new burst coherent demodulator that improves transmission quality of microcellular TDMA/TDD systems for personal communications and has configuration suitable for low power consumption with LSIC-implementation. To achieve the better transmission quality, the proposed demodulator employs coherent detection with a unique carrier recovery scheme that can operate without any preamble for carrier recovery. In addition, the demodulator uses a clock recovery scheme with clock phase estimation using twice differentiation, which eliminates hangup and attains fast clock acquisition at 2 samples/symbol. Experimental results clarify the superiority of the proposed coherent demodulator for microcellular TDMA/TDD systems. The proposed coherent demodulator reduces the irreducible frame error rate by 40%, and achieves 4dB improvement at the frame error rate of 10% compared with differential detection under the Rayleigh fading (fD/fs=810-5, τrms/Ts=510-2) typical of personal communication environments.

This paper proposes a semi-autonomous frame synchronization scheme for a TDMA (Time Division Multiple Access)-TDD (Time Division Duplexing) personal communication system to realize accurate frame synchronization in a simple manner. The proposed scheme selects specific adjacent base stations by the station indicator (SID), carries out high resolution frame timing control, and compensates the propagation delay between base stations by using geographical data. This autonomously synchronizes all base stations to each other. Computer simulation and analysis results confirm the accurate and stable TDMA frame synchronization of all base stations even in fading environments.

This paper proposes a digitalized quadrature modulator for burst-by-burst carrier frequency hopping in TDMA-TDD systems. It employs digital frequency synthesis and a multiplexing modulation scheme to give the frequency offset to the modulated IF signal. Moreover, to reduce the frequency settling time of the RF synthesizer below the guard time duration, a phase and frequency preset (PFP) PLL synthesizer is employed. By employing the digital modulation scheme, the proposed modulator needs only one D/A converter, as a result, the complexity of adjusting the DC offset and amplitude between analog signals of the in-phase and the quadrature phase is eliminated. The performance of the proposed modulator is analyzed theoretically and simulated by computers. Theoretical analyses show that the frequency settling time with 15MHz hopping width in the 1900MHz band is reduced by more than 75% from that of the conventional synthesizer. The settling time is less than 40µs which is shorter than the typical guard time of the burst signal format. The analyses also show that the power consumption of the proposed modulator is lower than that of the conventional modulator employing a full band digital frequency converter. Furthermore, the computer simulation confirms that the power spectra and the constellations of the proposed modulator for the coherent and the π/4-shift QPSK modulation schemes can be successfully generated.

Antenna selection diversity is an effective method to achieve both better transmission performance and compact circuit implementation in TDMA portable radio communications. However, diversity performance in fast fading environments is insufficient. This paper proposes a novel predictive antenna selection diversity scheme, PASD, which improves the diversity performance for higher fading rates. In PASD, received signal power for the assigned data slot is predicted from previously measured data. Thus, selection errors due to the receiving power changes caused by fast Rayleigh fading can be effectively avoided. An experimental result for a 3-ch TDMA system with a frame duration of 20ms shows that the diversity gain was increased by 1.3dB over the conventional method for a fading rate of 40Hz. PASD is also shown to have improved diversity performance against cochannel interference.

In order to construct a high-capacity and high-reliable indoor wireless communications system, it is essential to design the modulation/demodulation, coding and access schemes with high and variable data rate transmission capabilities, which meet the technical requirements inherent to wireless communications, i.e., high frequency utilization efficiency and robustness for fading. In this paper, we propose the frequency and time division multiple access with demand-assignment (FTDMA/DA) using multicarrier modulation as a frequency and time synchronous answer to meet the requirements, and analyze the performance of the FTDMA/DA system, taking account of teletraffic characteristics of multimedia information sources.

This paper presents a delivery mechanism using a spectrum delivery switch (SDS) in a microcell system. In our fiber-optic microcell systems, modulators, demodulators and spectrum delivery switches are installed in a central station. A spectrum delivery switch controls provide flexible dynamic channel assignment and functions as a hand over algorithm. This control method employs a TDMA time slot switch and a MODEM connection switch. The relation between blocking probability and offered traffic are described and computer simulation results are shown. The results indicate an improvement in this blocking probability over conventional systems.

This paper proposes a feedback-loop type transmission power control (TPC) scheme coupled with first and second order prediction methods and analyzes the optimum control period and residual control error. In order to minimize residual control error, the three main factors contributing to residual control error are analyzed. First, to detect accurately up-link rain attenuation, a channel quality detection method is proposed and analyzed experimentally for puseudo-error detection. Second, rain attenuation rates in Ka band are measured and analyzed statistically. Finally, the optimum control period of the proposed TPC scheme is analyzed. The simulation results on the prototype TPC system show a maximum of 4.5 dB residual control error is achievable with an optimum control period of about 1 second to 1.5 seconds.

This paper proposes a self frequency preset (SFP) PLL synthesizer to realize a simple frequency preset PLL synthesizer with temperature-resistant and shorter frequency settling time than the conventional temperature un-compensated phase and frequency preset (PFP) PLL synthesizer. Since the proposed synthesizer employs a simple frequency locked loop (FLL) circuit to preset the output frequency at each frequency hopping period, the synthesizer eliminates the need to store f-V characteristic of the VCO in ROM. The frequency settling time of the proposed synthesizer is theoretically and experimentally analyzed. The theoretical analysis using the realistic f-V characteristic of a IF band VCO show that the frequency settling time of the proposed synthesizer is 130µs shorter than that of the conventional PFP PLL synthesizer at 40MHz hopping in the 200MHz band for all temperatures. Furthermore, the experimental results confirm that the frequency acquisition time of a prototype FLL circuit is accordant with the calculated results. Thus, the proposed SFP PLL synthesizer can achieve faster frequency settling than the conventional PFP PLL synthesizer for all temperatures and its simple configuration allows to be easily implemented with existing CMOS ASIC devices.

This paper describes a perspective on Personal Communicatoins Services (PCS) and technological trends. It takes into consideration rules pertaining to the use of PCS for mobile radio communication and countermeasures to cope with the huge increase in PCS subscribers. In this paper, PCS network structures, inter-regional roaming, microcell structure, radio access and channel access methods are also covered as PCS technologies. Furthermore, trends in domestic and international standards are also described. Although these technologies present many difficulties, we believe that they will be overcome and PCS services will be introduced in the near future.

This paper describes voice communication connection controls in digital public land mobile networks (D-PLMNs). Voice communications in the D-PLMNs are carried at about 10 kbit/s over narrow-band TDMA channels with highly efficient cellular voice encoding schemes. Extensive research is being carried on half-rate voice encoding schemes that will effectively double radio resources. We first outline the configuration of voice communication connection between a cellular phone in the D-PLMN and a telephone in a fixed network, and we describe the optimum position for the CODECs that transform cellular voice codes to the conventional voice codes used in the fixed network, and vice versa. Then we propose a CODEC-bypassed communication control scheme that improves the quality of voice communication between cellular phones. And we propose a cellular voice code negotiation scheme in the D-PLMN which supports different cellular voice encoding schemes. We also propose an efficient channel reassignment scheme for effectively assigning TDMA channels to voice calls with two different bitrates (full-rate and half-rate), and we analyze this scheme's traffic capability. Finally, we describe a dual-tone multiple-frequency (DTMF) signal transmission scheme and estimate the number of DTMF signal senders required in the D-PLMN.

This paper proposes a high resolution and fast frequency settling PLL synthesizer for frequency hopping radio communication equipment. The proposed synthesizer enables the carrier frequency to be changed within the duration of a burst signal and yields higher frequency resolution than the reference signal frequency. To reduce frequency settling time without degradation of frequency resolution and phase noise, this paper proposes a new phase and frequency preset (PEP) PLL synthesizer which employs a digital phase accumulator to generate high resolution reference signal. Experimental results show that the settling time of a prototype synthesizer is less than 300µs while spurious signals are suppressed by more than 55 dB. In comparison with conventional PLL synthesizers, the frequency settling time is reduced by 80%. Furthermore, the higher frequency resolution than the reference signal is successfully demonstrated. Therefore, the proposed PFP PLL synthesizer with the digital reference signal can achieve the output signal with high frequency resolution less than 1Hz.