This paper describes a spatial spectral subtraction method by using the complementary beamforming microphone array to enhance noisy speech signals for speech recognition. The complementary beamforming is based on two types of beamformers designed to obtain complementary directivity patterns with respect to each other. In this paper, it is shown that the nonlinear subtraction processing with complementary beamforming can result in a kind of the spectral subtraction without the need for speech pause detection. In addition, the optimization algorithm for the directivity pattern is also described. To evaluate the effectiveness, speech enhancement experiments and speech recognition experiments are performed based on computer simulations under both stationary and nonstationary noise conditions. In comparison with the optimized conventional delay-and-sum (DS) array, it is shown that: (1) the proposed array improves the signal-to-noise ratio (SNR) of degraded speech by about 2 dB and performs more than 20% better in word recognition rates under the conditions that the white Gaussian noise with the input SNR of -5 or -10 dB is used, (2) the proposed array performs more than 5% better in word recognition rates under the nonstationary noise conditions. Also, it is shown that these improvements of the proposed array are same as or superior to those of the conventional spectral subtraction method cascaded with the DS array.

A novel block coding scheme based on complementary sequences which is capable of both error correction and peak to average power ratio reduction has been proposed for M-ary PSK multicarrier systems. Generator matrices for the number of carriers N = 2k where k = 2,3,...are derived. The effectiveness of the scheme has been confirmed by computer simulations.

This paper describes a design technique of perfect reconstruction (PR) two-channel IIR filter bank. M.J.T. Smith et al., gave two types of PR IIR filter bank systems. One is the system such that the analysis and synthesis filters with nonlinear phase are implemented with all-pass polyphase filters and satisfy the power complementary condition approximately. The other is the system such that all the analysis and synthesis filters have liner phase responses and do not satisfy the power complementary condition. To improve coding performance, we propose a filter bank system such that all the analysis and synthesis filters have linear phase and satisfy the power complementary condition approximately.

The supervisory control theory of discrete event dynamic systems was proposed in the framework of automata and formal languages. The concept of decentralized supervisory control was developed for the local supervisor Si whose concurrent operation results in the closed-loop language L (Si/G) equal to that of global supervisor, L (S/G). In this letter we extend this concept by considering the problem of optinal combination of decentralized with centralized control in case pure decentralized control happens to be inadequate. We introduce the concept of locally controllable complementary tuple and present an analytical framework for nonhomogeneous decentralized supervisory control systems.

Recently two interesting conjectures on the linear complexity of binary complementary sequences of length 2nN0 were given by Karkkainen and Leppanen when those sequences are considered as periodic sequences with period 2nN0, where those sequences are constructed by successive concatenations or successive interleavings from a pair of kernel complementary sequences of length N0. Their conjectures were derived from numerical examples and suggest that those sequences have very large linear complexities. In this paper we give the exact formula of characteristic polynomials for those complementary sequences and show that their conjectures are true.

The base transit time of an Aluminum-graded-base PNp AlGaAs/GaAs heterojunction bipolar transistor (HBT) was studied in order to clarify the effect of aluminum grading in the base. Theoretical analysis using a classical drift diffusion model with velocity saturation at the base-collector junction and a high base quasielectric field (58 keV/cm) created by 20%-aluminum linear grading in a 400 base, leads to a base transit time (τb) of 0.9 ps. The base transit time is reduced by four times, compared to the base transit time of 3.6 ps without aluminum grading in the base. In order to demonstrate this advantage, we fabricated aluminum-graded-base PNp AlGaAs/GaAs heterojunction transistor which employs a 20%-aluminum linear graded 400 -wide base. The device with a 2 µm 10 µm emitter showed high RF performance with a cut-off frequency (ft) of 37 GHz and a maximum oscillation frequency (fmax) of 30 GHz at a collector current density of 3.4 104 A/cm2. Further analysis using direct parameter extraction of a small signal circuit model under the collector current density of 1.1-9.9104 A/cm2 indicated the intrinsic transit time, which is the sum of the base transit time and the collector depletion layer transit time (τSC), was as low as 2.3 ps under lowinjection level. Subtracting the collector depletion-layer transit time from the intrinsic time leads to a base transit time of 1.1 ps, which is close to the theoretical base transit time and is the shortest value ever reported. The structure is very attractive for pnp-type AlGaAs HBTs combined with Npn HBTs for complementary applications.

The state of the art of low-voltage (LV) analog circuit design techniques is reviewed, and fundamental design techniques are identified and classified as follows: 1) current-mode, 2) series-to-parallel, 3) signal range sharing, 4) dynamic bias, 5) linear bias, and 6) LV regulator. A relatively wide variety of low frequency application circuits have been developed, but future development is expected for wide-bandwidth application circuits such as a voltage-controlled-oscillator (VCO), a balanced multiplier, etc. The circuit techniques such as current-mode, signal range sharing, and dynamic bias will probably be most important for advanced future circuit designs.

A high-speed high-density self-aligned pnp technology for complementary bipolar ULSIs has been developed to achieve high-speed and low-power performance simultaneously. It is fully compatible with the npn process. A low sheet-resistance p+ buried layer and a low sheet-resistance extrinsic n+ polysilicon layer with U-grooved isolation enable the transistor size to be scaled down to about 20 µm2. Current gain of 85 with 4-V collector-emitter breakdown voltage was obtained without any leakage current arising from emitter-base forward tunneling or recombination, which indicates no extrinsic base encroachment problem. A shallow emitter junction depth of 45 nm and narrow base width of 30 nm, obtained by utilizing an optimized retrograded p-well, an arsenic-implanted intrinsic base, and emitter diffusion from BF2-implanted polysilicon, improve the maximum cutoff frequency to 35 GHz. The power dissipation of the pnp pull-down complementary emitter-follower ECL circuit with load capacitances is calculated to be reduced to 20-40% of a conventional ECL circuit.

Many typical control problems such as deadlock avoidance problems and mutual exclusion problems can be formulated as forbidden marking problems. This paper studies a forbidden marking problem in controlled complementary-places Petri nets, which are suitable model for sequential control systems. We show a necessary and sufficient condition for the existence of a control law for this problem. We also obtain a maximally permissive control law which allows a maximal number of transitions to fire subject to a condition that forbidden markings will never be reached.

This report describes 4-2 compressors composed of Complementary Pass-Transistor Logic (CPL). We will show that circuit designs of the 4-2 compressors can be optimized for high speed and small size using only exclusive-OR's and multiplexers. According to a circuit simulation with 0.8µm CMOS device parameters, the maximum propagation delay and the average power consumption per unit adder are 1.32 ns and 11.6 pJ, respectively.

We propose two types of key management systems that use complementary exponential calculation, in which users in the system divide into groups, and the different modulus numbers are assigned to each group and edges between groups. Key generation information over the modulus numbers is issued to a user by a trusted center. The user who receives the information can generate shared encryption keys between users in the system without using key exchange protocol. In our proposed system, the number of primes is one of the parameters for generating key generation information. The number decreases in inverse proportion to the square of the number of groups compared to the original method. Our proposed technique enabled us to extend the number of users in the system to more than one million, which is not possible with the original method.

A new optical interconnection system suitable for high-speed ICs using a novel complementary optical interconnection technique has been developed. This system uses paired light sources and photodetectors for optical complementary operation, and greatly lowers the power consumption compared with conventional systems. Analyses and experimental results indicate that this system can operate in the gigabit range, and reduces power consumption to less than 20% of that in conventional systems at 1 Gb/s.

Frequency Selective Screens (FSS) with conductor or complementary aperture array are investigated. The electric current distribution on conductor or the magnetic current distribution on aperture is determined by the moment method in the spectral domain. In addition, the power reflection coefficients are calculated and the scattering properties are considered.