Motivated by the design of fault-tolerant multiprocessor interconnection networks, this paper considers the following problem: Given a positive integer t and a graph H, construct a graph G from H by adding a minimum number Δ(t, H) of edges such that even after deleting any t edges from G the remaining graph contains H as a subgraph. We estimate Δ(t, H) for the hypercube and torus, which are well-known as important interconnection networks for multiprocessor systems. If we denote the hypercube and the square torus on N vertices by QN and DN respectively, we show, among others, that Δ(t, QN) = O(tN log(log N/t + log 2e)) for any t and N (t 2), and Δ(1, DN) = N/2 for N even.

Exploring enormous state graphs represented implicitly by ordered binary decision diagrams (OBDDs) is one of the most successful applications of OBDDs. However, our worst-case analysis of implicit graph representations by OBDDs shows that there are cases where OBDD representations are not optimal and require more space than adjacency lists. As an improvement, we propose a new type of BDDs, called Patricia BDDs, which are capable of implicit representation of graphs while their worst-case sizes are kept equal or less than adjacency lists and OBDDs.

We present a volume rendering algorithm which renders images at approximately two to seven times the speed of a conventional ray caster with almost no visible loss of image quality. This algorithm traverses the volume data in object order and renders the image by performing ray casting for the pixels within the footprint of the voxel (i.e., rectangular prism) being processed. The proposed algorithm supports the rendering of both single and multiple isosurfaces with arbitrary opacity values. While the projection approach to volume rendering is not new, we present an algorithm specifically designed for the perspective projection, evaluate its rendering speed for both single and multiple isosurfaces with arbitrary opacity values, and examine how efficiently it uses cache memory.

A simple algorithm is proposed for representing nonseparable functions by equivalent separable functions. In this algorithm, functions are first represented by computational graphs, which are directed graphs representing the computational process of the functions. Then, the vertices of the computational graphs are searched in preorder or postorder, and the transformation to separable forms is performed at the places where it is necessary. By this repetition of the transformation, nonseparable functions are represented by separable functions automatically. The proposed algorithm will be useful in various fields of science and engineering because funcutions of one variable are easy to deal with.

Let W be a real symmetric matrix associated with a weighted 2-connected planar graph. It is important to study a fast algorithm to solve the linear system Wx = c, since the system has many various applicaions, for example to solve partial defferencial equations numerically. In this paper, a new algorithm for the solution of a linear system of equations by Δ-Y transformations is proposed, and a sufficient condition for using this algorithm is proved. We show that this algorithm solves in O (n3/2) time a linear system associated with a planar graph which is embedded a cylinder graph with n vertices.

We have devised a polynomial time algorithm to decide the security of cryptographic protocols formally under certain conditions, and implemented the algorithm on a computer as a supporting system for deciding the security. In this paper, a useful approach is presented to decide security problems which do not satisfy some of the above-mentioned conditions by using the system. For its application, we consider a basic security problem of Kerberos protocol, whether or not an enemy can obtain the session key between a client and a server by using any information not protected in communication channels and using any operation not prohibited in the system. It is shown that Kerberos is secure for this problem.

When people watch such motion pictures as documentaries or educational-type films, it is very natural for them to be interested in moving objects in the movies and be eager to know the detailed information related to these object. Therefore, a mechanism that enables users to directly pick up object information from motion pictures is necessary to make a movie system feasible. For this reason, we are researching techniques on using objects in motion pictures as hypermedia anchors. We call a movie system that provides the above mechanism a video hypermedia system. An object in a motion picture can generally be considered as a complex object which includes many parts. To allow users to obtain information related to each part, a system must be able to provide anchors corresponding to each part in each complex object. For this, authors cannot help defining all anchors in all frames, since the visual status of each part varies from moment to moment. This paper presents our approach for managing objects in motion pictures for video hypermedia systems. The main feature of the proposed method is to apply computer graphic techniques to the defining of anchors for a complex object.

Signal Transition Graphs (STG'S) [1] are Petrinets [2], which were introduced to represent a behavior of asynchronous circuits. To derive logic functions from an STG, the reachability graph should be constructed. In the verification of STG's some method based on Occurrence nets (OCN) and its prefix, called unfollding, has been proposed [3], [4]. OCN's can represent both causality and concurrency between two nodes by net stryctyre. In this paper, we propose an efficient algorithm to derive a logic function by generating sub-state space of a given STG using the structural properties of OCN. The proposed algorithm can be seem as a parallel algorithm for deriving a logic function.

In this paper we propose a new medical image processing system called Virtualized Endoscope System (VES)", which can examine the inside of a virtualized human body. The virtualized human body is a 3-D digital image which is taken by such as X-ray CT scanner or MRI scanner. VES consists of three modules; (1) imaging, (2) segmentation and reconstruction and (3) interactive operation. The interactive operation module has following thee major functions; (a) display of, (b) measurement from, and (c) manipulation to the virtualized human body. The user of the system can observe freely both the inside and the outside of a target organ from any point and any direction freely, and can perform necessary measurement interactively concerning angle and length at any time during observation. VES enables to observe repeatedly an area where the real endoscope can not enter without pain from any direction which the real endoscope can not. We applied this system to real 3-D X-ray CT images and obtained good result.

A uniquely decodable code pair (C, S) is considered for the two-user binary adder channel. When the first code C is linear, a lower bound of |S| is formulated and a uniquely decodable code pair (C, S) is presented. When a rate R1 of C is less than 1/3, a rate R2of S is greater than the best rate known previously.

A program slice is a set of program statements that directly or indirectly contribute to the values assumed by a set of variables at some program execution point. A few slicing algorithms have proposed to far but none of them are considered from the viewpoint of program modification. In this paper, we define a variable dependence graph (VDG) and show a new slicing algorithm on VDG. We also compare the time complexity of the algorithm with that of other existing algorithms and discuss the suitableness of our algorithm for program modification. As the result of this, we argue our algorithm is suitable for embedding debugging systems.

We define the Reallocation Problem to determine whether we can move products from their current store-houses to target storehouses in a number of moves which is less than or equal to a given number. This problem is defined simply and can be applied to many practical problems. We give necessary and sufficient conditions for feasibility for Reallocation Problems under various conditions, and propose liner time algorithms, when the volume of the products is restricted to 1. Moreover, we show that the Reallocation Problem is NP-complete in the strong sense, when the volume of the products is not restricted.

Polynomials are called permutation polynomials if they induce bijective functions. This paper investigates algebraic properties of permutation polynomials over a finite field, especially properties associated with permutation cycles. A permutation polynomial has a simple structure but good randomness properties suitable for applications. The cycle structure of permutations are considered to be related to randomness. We investigate the algebraic structure from the viewpoint of randomness. First we show the relationship between polynomials and permutations using a matrix equation. Then, we give a general form of a permutation polynomial corresponding to a product C1C2Ck of pairwise disjoint cycles. Finally, permutation polynomials with fixed points -or with 2, 3 and 4-cycles -and their compositions are given together with distribution of degree of the permutation polynomials.

It is known that the problem of determining, given a planar graph G with maximum vertex degree at most 4 and integers m and n, whether G is embeddable in an m n grid with unit congestion is NP-hard. In this paper, we show that it is also NP-complete to determine whether G is embeddable in ak n grid with unit congestion for any fixed integer k 3. In addition, we show a necessary and sufficient condition for G to be embeddable in a 2 grid with unit congestion, and show that G satisfying the condition is embeddable in a 2 |V(G)| grid. Based on the characterization, we suggest a linear time algorithm for recognizing graphs embeddable in a 2 grid with unit congestion.

Various kinds of new architectures have been proposed to enhance operating performance of the DRAM. This paper reviews these architectures including EDO, SDRAM, RDRAM, EDRAM, and CDRAM. The EDO slightly modifies the output control of the conventional DRAM architecture. Other innovative architectures try to enhance the performance by taking advantage of DRAM's internal multiple bits architecture with internal pipeline, parallel-serial conversion, or static buffers/on-chip cache. A quantitative analysis based on an assumption of wait cycles was made to compare PC system performance with some architectures. The calculation indicated the effectiveness of external or on-chip cache. Future trends cover high-speed I/O interface, unified memory architecture, and system integrated memory. The interface includes limited I/O swing such as HSTL and SSTL to realize more than 100MHz operation. Also, Ramlink and SyncLink are briefly reviewed as candidates for next generation interface. Unified memory architecture attempts to save total memory capacity by combining graphics and main memory. Advanced device technology enables system integration which combine system logic and memory. It suggests one potential direction towards system on a chip in the future.

A directed graph G = (V,E) is called the n-rotator graph if V = {a1a2an|a1a2an is a permutation of 1,2,,n} and E = {(a1a2an,b1b2bn)| for some 2 i n, b1b2bn = a2aia1ai+1an}. We show that for any pair of distinct nodes in the n-rotator graph, we can construct n - 1 disjoint paths, each length < 2n, connecting the two nodes. We propose a nonadaptive fault-tolerant file transmission algorithm which uses these disjoint paths. Then the probabilistic analysis of its reliability is given.

A speedup of Lenstra's Elliptic Curve Method of factorization is presented. The speedup works for integers of the form N = PQ2, where P is a prime sufficiently smaller than Q. The result is of interest to cryptographers, since integers with secret factorization of this form are being used in digital signatures. The algorithm makes use of what we call Jacobi signatures. We believe these to be of independent interest.

A new yield prediction model has been developed, which can successfully describe the actual chip fabrication yield. It basically consists of modeling of particles deposited on wafer surface, considering the change in their size and spatial distribution due to the subsequent processing steps and a new concept of virtual line width in pattern layouts. It is confirmed that this yield prediction model serves as an effective navigator for improvement/optimization of fabrication lines such as pointing out the process step/equipments to be modified for yield improvements.

This paper presents implicit representation of binary decision diagrams (implicit BDDs) as a new effecient data structure for Boolean functions. A well-known method of representing graphs by binary decision diagrams (BDDs) is applied to BDDs themselves. Namely, it is a BDD representation of BDDs. Regularity in the structure of BDDs representing certain Boolean functions contributes to significant reduction in size of the resulting implicit BDD repersentation. Since the implicit BDDs also provide canonical forms for Boolean functions, the equivalence of the two implicit BDD forms is decided in time proportional to the representation size. We also show an algorithm to maniqulate Boolean functions on this implicit data structure.

This letter shows that a portable visual stimulator for MEG measurements can be realized using an optical fiber bundle and a CRT display system offering high brightness and high speed raster scanning, and that MEGs with neither magnetic contamination nor jitter can be measured by the stimulator.