A direct-conversion receiver integrated with the CMOS subharmonic frequency tripler (SFT) for V-band applications is designed, fabricated and measured using 0.13-µm CMOS technology. The receiver consists of a low-noise amplifier, a down-conversion mixer, an output buffer, and an SFT. A fully differential SFT is introduced to relax the requirements on the design of the frequency synthesizer. Thus, the operational frequency of the frequency synthesizer in the proposed receiver is only 20 GHz. The fabricated receiver has a maximum conversion gain of 19.4 dB, a minimum single-side band noise figure of 10.2 dB, the input-referred 1-dB compression point of -20 dBm and the input third order inter-modulation intercept point of -8.3 dB. It draws only 15.8 mA from a 1.2-V power supply with a total chip area of 0.794 mm0.794 mm. As a result, it is feasible to apply the proposed receiver in low-power wireless transceiver in the V-band applications.

This paper describes two different types of GaAs-HBT compatible, base-collector diode 0/20-dB step attenuators--diode-linearizer type and harmonics-trap type--for 3.5-GHz-band wireless applications. The two attenuators use an AC-coupled, stacked type diode switch topology featuring high power handling capability with low bias current operation. Compared to a conventional diode switch topology, this topology can improve the capability of more than 6 dB with the same bias current. In addition, successful incorporation of a shunt diode linearizer and second- and third-harmonic traps into the attenuators gives the IM3 distortion improvement of more than 7 dB in the high power ranging from 16 dBm to 18 dBm even in the 20-dB attenuation mode when IM3 distortion levels are basically easy to degrade. Measurement results show that both the attenuators are capable of delivering power handling capability (P0.2 dB) of more than 18 dBm with IM3 levels of less than -35 dBc at an 18-dBm input power while drawing low bias currents of 3.8 mA and 6.8 mA in the thru and attenuation modes from 0/5-V complementary supplies. Measured insertion losses of the linearizer-type and harmonics-trap type attenuators in the thru mode are as low as 1.4 dB and 2.5 dB, respectively.

In this study, an improved heterojunction bipolar transistor (HBT) monolithic microwave integrated circuit (MMIC) active mixer is designed and fabricated. The HBT MMIC active mixer that is integrated with a low-noise amplifier (LNA) and active power adder can not only achieve high isolation, but can also dispense with one active component and reduce power consumption at the same time. Measurement results show that the conversion gain, LO-RF isolation, and double sideband noise figure (DSB-NF) of the proposed mixer are 22 dB, 40 dB, and 7 dB, respectively.

A compact Ku-band 5-bit monolithic microwave integrated circuit (MMIC) phase shifter has been demonstrated. The total gate width of switching FETs and the total inductance of spiral inductors are proposed as the figures of merit for compactness. The phase shifter uses the T-type and PI-type high-pass filter (HPF)/band-pass filter (BPF) circuits in which FET "off"-state capacitances are incorporated as the filter elements. According to the figures of merit, the T-type is selected for 90-degree phase shift circuit and the PI-type is selected for the 45-degree phase shift circuit. The fabricated 5-bit phase shifter performs average insertion loss of 5.6 dB and RMS phase shift error of 3.77 degrees with die size of 1.65 mm 0.76 mm (1.25 mm2) in Ku-band.

A C-Ku band 5-bit MMIC phase shifter using optimized reflective series/parallel LC circuits is presented. The proposed circuit has frequency independent characteristics in the case of 180 phase shift, ideally. Also, an ultra-broad-band circuit design theory for the 180 optimized reflective circuit has derived, which gives optimum characteristics compromising between loss and phase shift error. The fabricated 5-bit MMIC phase shifter with SPDT switch has successfully demonstrated a typical insertion loss of 9.4 dB 1.4 dB, and a maximum RMS phase shift error of 7 over the 6 to 18 GHz band. The measured results validate the proposed design theory of the phase shifter.